I don't know about Honeywell, but DEC/Digital PDP-10 definitely had
that feature, and I believe also the earlier PDP-6 from which the -10
derived. More precisely, most instructions (aside from some special
cases) have a register-memory aka 1.5-address format, containing an
actual (well, virtual on later models) 18-bit address, a 4-bit index
register number which if nonzero causes that register's contents to be
added, and a (single) indirect bit which if set causes the result to
be treated not as the address of the operand, but as the address of an
indirect word which in turn contains address, index, and indirect
bits, thus iterating possibly multiple times.
AIR the actual CPUs had a limit on _clocks_ for a single indirect
chain. But in those days hardware, especially core memory, (almost
always) had a fixed cycle time and latency, so this was effectively a
limit on levels of indirection. One popular emulator now available
(SIMH) does just hardcode a limit of 32.
I doubt C has ever been implemented on that architecture by setting
the relevant bit in pointers. If we have char *****p, then both **p
and ****p are legal expressions: the number of dereferences is
controlled by the program, not the data. C doesn't have a
"dereference as much as you can" operator.
Concur.
I *would* be surprised if there was such a modern computer.
I also -- but pleasantly surprised.
- formerly david.thompson1 || achar(64) || worldnet.att.net