How put a signal value into REPORT ?

Discussion in 'VHDL' started by ALuPin, Jan 9, 2004.

  1. ALuPin

    ALuPin Guest

    Hi everybody,

    How can I put the value of a signal into a report ?


    for example:

    .....
    if count=1 then
    sig_value <= '1';
    count := count+1;
    elsif count=2 then
    report "The value is {value of sig_value} ";
    ....

    Thank you very much.

    Kind regards

    Andres
    ALuPin, Jan 9, 2004
    #1
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  2. ALuPin

    Stefan Frank Guest

    Stefan Frank, Jan 9, 2004
    #2
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  3. ALuPin

    VhdlCohen Guest

    >
    >How can I put the value of a signal into a report ?
    >

    This was addressed before, but you can use the image package at my site.
    -----------------------------------------------------------------------------
    Ben Cohen Trainer, Consultant, Publisher (310) 721-4830
    http://www.vhdlcohen.com/
    Author of following textbooks:
    * Using PSL/SUGAR for Formal and Dynamic Verification 2nd Edition, 2004 isbn
    0-9705394-6-0
    * Real Chip Design and Verification Using Verilog and VHDL, 2002 isbn
    0-9705394-2-8
    * Component Design by Example ", 2001 isbn 0-9705394-0-1
    * VHDL Coding Styles and Methodologies, 2nd Edition, 1999 isbn 0-7923-8474-1
    * VHDL Answers to Frequently Asked Questions, 2nd Edition, isbn 0-7923-8115
    ------------------------------------------------------------------------------
    VhdlCohen, Jan 9, 2004
    #3
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