how to implement CLZ (count leading zeros) behavioural, using only gates

Discussion in 'VHDL' started by lucahtc, Jul 8, 2010.

  1. lucahtc

    lucahtc

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    i would like to implement a count leading zeros (or count leading ones) only using gates to count how many zeros there are at the beginning of a 32 bit register

    example
    000001010011..... count = 5
     
    lucahtc, Jul 8, 2010
    #1
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