How to purposely make pipelining in Handel-C?

Discussion in 'VHDL' started by Peggy, Sep 8, 2004.

  1. Peggy

    Peggy Guest

    Hi, all,

    How to purposely make pipelining in Handel-C?

    Say, I need to read in a lot of 64-bit numbers using Celoxica's DSM (Data Stream
    Manager). Since DsmWord is 32-bit in length, two DsmRead and one assignment are
    needed. Can I pipeline these two DsmRead and the assignment statement?
    Hopefully, I can just maintain 4 32-bit variables (temp1 to temp4) for DsmRead.
    When I concatenate temp1 and temp2 and assign the value to a 64-bit variable v1,
    I can read in 2 DsmWords to temp3 and temp4. Then, while do concatenation on
    temp3 and temp4 to assign to v2, I can read into temp1 and temp2, and will
    concatenate them to v3 in the next clock cycle. To achieve the above, how to
    write the handel-C code?

    By the way, is there any means to directly assign a 32-bit value read from DSM
    to a portion of a 64-bit variable?

    Thanks a lot!

    Best regards,
    Peggy
     
    Peggy, Sep 8, 2004
    #1
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