how to write a conditional assignment over generic or constant?

Discussion in 'VHDL' started by sm.soimu@gmail.com, Apr 24, 2006.

  1. Guest

    Hello,

    I would like to write in VHDL an equivalent code for:

    parameter INSTANCE = 1;
    parameter DATA_WIDTH = (INSTANCE == 1) ? 8 : 16;

    The equivalent for parameter statement should be generic or constant,
    but I see no way to write the equivalent VHDL code for the above
    VERILOG code.

    Can anyone suggest any way to write it?

    Thank you in advance!

    Regards,
    Sorin SOIMU
    , Apr 24, 2006
    #1
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  2. Mike Treseler, Apr 24, 2006
    #2
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  3. Guest

    Thanks Mike! It worked.

    Regards,
    Sorin
    , Apr 25, 2006
    #3
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