how to write VHDL for shifting?

Discussion in 'VHDL' started by walala, Nov 20, 2003.

  1. walala

    walala Guest

    For example,

    T2:=CONV_INTEGER(X)*(2**5)-CONV_INTEGER(X)*(2**3)+CONV_INTEGER(X)

    how to use shifting to represent it?

    thanks a lot,

    -Walala
     
    walala, Nov 20, 2003
    #1
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  2. "walala" <> schreef in bericht
    news:bphc5c$om4$...
    > For example,
    >
    > T2:=CONV_INTEGER(X)*(2**5)-CONV_INTEGER(X)*(2**3)+CONV_INTEGER(X)
    >
    > how to use shifting to represent it?
    >
    > thanks a lot,
    >
    > -Walala


    Maybe your synthesis tool can handle this! You want to multiply X with the
    constant 41.
    Try this

    LIBRARY ieee;
    USE ieee.std_logic_1164.ALL;
    USE ieee.numeric_std.ALL;
    ENTITY mul IS
    PORT (x : IN unsigned(7 downto 0);
    y : OUT unsigned(15 downto 0));
    END mul;

    ARCHITECTURE behaviour OF mul IS
    SIGNAL qi : std_logic;
    BEGIN
    y <= 41 * x;
    END behaviour;

    Egbert Molenkamp
     
    Egbert Molenkamp, Nov 20, 2003
    #2
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  3. walala

    MM Guest

    "walala" <> wrote in message
    news:bphc5c$om4$...
    > For example,
    >
    > T2:=CONV_INTEGER(X)*(2**5)-CONV_INTEGER(X)*(2**3)+CONV_INTEGER(X)
    >
    > how to use shifting to represent it?


    signal foo: std_logic_vector(7 downto 0);
    signal shifted_by_2bits: std_logic_vector(7 downto 0);

    shifted_by_2bits <= "00" & foo(7 downto 2);

    Remember about the sign extension if you do signed arithmetic.

    There are standard shift functions as well...


    /Mikhail
     
    MM, Nov 20, 2003
    #3
  4. walala

    Brent Hayhoe Guest

    MM wrote:
    > "walala" <> wrote in message
    > news:bphc5c$om4$...
    >
    >>For example,
    >>
    >>T2:=CONV_INTEGER(X)*(2**5)-CONV_INTEGER(X)*(2**3)+CONV_INTEGER(X)
    >>
    >>how to use shifting to represent it?

    >
    > signal foo: std_logic_vector(7 downto 0);
    > signal shifted_by_2bits: std_logic_vector(7 downto 0);
    >
    > shifted_by_2bits <= "00" & foo(7 downto 2);
    >
    > Remember about the sign extension if you do signed arithmetic.
    >
    > There are standard shift functions as well...
    >
    > /Mikhail


    Consider using the IEEE Numeric_Std package and defining your signals as either
    Signed or Unsigned types dependant on the arithmetic that you are performing.
    All the operator overloading is then predefined for you and you don't need to
    concern yourself with sign extension when using Signed... it's handled by the
    package functions.

    N.B. integer conversion then becomes the 'To_Integer' function.

    In general this should lead to more comprehensible code, and by inference, more
    maintainable code.

    Believe me, I have suffered the nightmare of converting a huge DSP design to
    Numeric_Std from the Synopsys Std_Logic_Arith and it's associated packages.
    Trying to work out when the designer switches from Unsigned to Signed numbers,
    when all the signals/variables are defined as Std_Logic_Vectors is not as easy
    as you might think!

    I hope these packages are not standardized into the IEEE library!

    --

    Regards,

    Brent Hayhoe.

    Aftonroy Limited
    Email: <A
    HREF="mailto:">
     
    Brent Hayhoe, Nov 21, 2003
    #4
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