image interpolaton (vertical tap)

Discussion in 'VHDL' started by jylee, Oct 15, 2004.

  1. jylee

    jylee Guest

    I am coding to implement vertical scaling(3tap).

    In case scaling factor is irrational number and expanding line number,

    sometimes new line data is needless because old line data is reused.

    I used 3 fifo memory.

    in case new line data is needless , how can i implemente using fifo memory??
     
    jylee, Oct 15, 2004
    #1
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