implementing usb 2.0 on FPGA

[techsavvy]

Hello,

I am really newbie with USB and FPGA.
I would like to implement USB interface for a peripheral using USB 2.0.
I have a virtex 4 FPGA and it seems they do have USB core with the EDK.
I have written the vhdl code for the peripheral.

I dont understand is how is my peripheral going to understand that the host has sent a read request and send the data on the OPB bus so that it goes to DPRAM to be transmitted on the USB cable through the SIE and PHY.

Do I have to add my peripheral on the OPB bus?

Any information is appreciated.

Thanks!