Indexing a Configuration Specification

Discussion in 'VHDL' started by travcoe21, Oct 19, 2006.

  1. travcoe21

    travcoe21 Guest

    Greetings --

    I have a group of transactor architectures (a two-dimensional array,
    actually) that all use the same interface. In an attempt to write
    compact code, I would like to have a single entity, a single component
    declaration for the entity, a single component instantiation in the
    testbench, and then use the indices of 2 nested generate loops to
    select which of the architectures is activated.

    The code sample below compiles without error, but when it is elaborated
    ModelSim looks for 128 copies of the architecture "XACTOR_ARCH", when
    what I wanted it to look for was an architecture name such as
    "analyze_2_6", etc.

    I also tried putting the expression for the architecture name directly
    in the configuration specification, but since the architecture name is
    a simple identifier I can't put an expression there.

    Does anyone have any ideas on how to do this? If I have to have 128
    different entities/component declarations/component instantiations,
    it's easy enough to do that, but I was hoping to find a more elegant
    solutions.

    Thanks for your help!

    Jeff Travis

    ---------------------------------- CODE SAMPLE
    ----------------------------------------------------------

    -- These nested generate
    loops specify the binding
    -- of the subfunction
    transactor component instan-
    -- tiation to
    different architectures of the ent-
    -- tity
    subfunc_xactor_fsm, depending on the func-
    -- tion and
    subfunction indices:
    PMC_Func_Xactors: for i in 15 downto 0 generate

    PMC_SubFunc_Xactors: for j in 7 downto 0 generate

    constant XACTOR_ARCH : string (11 downto 1)
    := "analyze_" & xactor_index_to_str (i) & "_" &
    xactor_index_to_str (j);

    for SubFunc_Xactor_inst: subfunc_xactor_fsm

    use entity lro_pse_tst.subfunc_xactor_fsm (XACTOR_ARCH);

    begin

    SubFunc_Xactor_inst: subfunc_xactor_fsm

    port map (

    CLK => CLK,
    RST_n => RST_n,
    XACTOR_START_n => XACTOR_START_n_sig,
    XACTOR_FUNC_CE_n => XACTOR_FUNC_CE_n_sig (i),
    XACTOR_SUBFUNC_CE_n => XACTOR_SUBFUNC_CE_n_sig (j),
    XFIFO_RD_PTR => XFIFO_RD_PTR_sig,
    XFIFO_RD_ARRAY => XFIFO_RD_ARRAY_sig

    );

    end generate;

    end generate;
    travcoe21, Oct 19, 2006
    #1
    1. Advertising

Want to reply to this thread or ask your own question?

It takes just 2 minutes to sign up (and it's free!). Just click the sign up button to choose a username and then you can ask your own questions on the forum.
Similar Threads
  1. C
    Replies:
    0
    Views:
    498
  2. Mark
    Replies:
    0
    Views:
    812
  3. Emin
    Replies:
    4
    Views:
    410
    Paul McGuire
    Jan 12, 2007
  4. Skybuck Flying
    Replies:
    30
    Views:
    1,103
    Bill Reid
    Sep 19, 2011
  5. C
    Replies:
    3
    Views:
    220
    Manohar Kamath [MVP]
    Oct 17, 2003
Loading...

Share This Page