Insert an image in vhdl as an array

Discussion in 'VHDL' started by triggerman, Dec 16, 2009.

  1. triggerman

    triggerman

    Joined:
    Dec 16, 2009
    Messages:
    2
    I want to insert an grayscale image(8 bpp its ok) as an array in VHDL.I am new to the language so the simplest thing i thought was this :
    PACKAGE newtype IS
    TYPE vector_array IS ARRAY (0 to 9,0 to 9) OF
    BIT_VECTOR(7 DOWNTO 0);
    END newtype;

    USE WORK.newtype.ALL;
    ENTITY test IS
    PORT ( inp1 : IN vector_array);
    END test;
    ARCHITECTURE arch OF test IS
    BEGIN
    END arch;

    The code above has no errors and do what i want but it uses many pins(800).So i want to ask if there is a solution to do the same thing(read an 10x10 array of bit vectors) but with less pins used.

    Thanks in advance
     
    triggerman, Dec 16, 2009
    #1
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