Integer to std_logic_vector?

Discussion in 'VHDL' started by Sebastian Eggers, Jun 30, 2005.

  1. Hi,

    i have to count several values from 0 to 99, at the moment i do it in an
    array of integer 0 to 99.

    As output-port i use a std_logic_vector(6 downto 0), but i may change
    this if necessary.

    How can i convert the integer to the vector? i have no idea and not
    found any solutions yet. Any hint would be helpful

    thanks
    Sebastian
     
    Sebastian Eggers, Jun 30, 2005
    #1
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  2. Sebastian Eggers

    Neo Guest

    use the conversion functions in the ieee numeric package or the
    std_logic package
     
    Neo, Jun 30, 2005
    #2
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  3. Sebastian Eggers

    Guest

    use ieee.std_logic_1164.all;
    use ieee.std_logic_arith.all;

    conv_std_logic_vector(7, 9);

    converts integer 7 to a std_logic_vector with 9 bits.

    Rgds
    André
     
    , Jun 30, 2005
    #3
  4. > use ieee.std_logic_1164.all;
    > use ieee.std_logic_arith.all;
    >
    > conv_std_logic_vector(7, 9);
    >
    > converts integer 7 to a std_logic_vector with 9 bits.


    Nope! Please stop using std_logic_arith package.

    use ieee.numeric_std.all

    std_logic_vector(to_unsigned(natural_number, nb_bits));

    Nico
     
    Nicolas Matringe, Jun 30, 2005
    #4
  5. Sebastian Eggers

    Galloth

    Joined:
    Nov 9, 2006
    Messages:
    1
    Why we should stop using std_logic_arith package?
     
    Galloth, Nov 9, 2006
    #5
  6. Sebastian Eggers

    Vivek Dhiman

    Joined:
    Jul 26, 2010
    Messages:
    1
    converts integer to a std_logic_vector

    It's simple firstly you should include these libraries
    ------------------------------------------
    USE ieee.std_logic_1164.ALL;
    USE ieee.std_logic_unsigned.all;
    USE ieee.numeric_std.ALL;
    -------------------------------------

    now suppose you have declared
    signal x : integer;
    signal sig : std_logic_vector (7 downto 0); --- (I am taking here length as 8 you take as much as you want)

    -------------------------------------------------
    x <= 2;
    sig <= std_logic_vector (to_unsgined(x,8 )) -- x is the integer and 8 is the length of std_logic vector sig . If your siganl's length is n (suppose) then you have to write...


    sig <= std_logic_vector (to_unsgined(x,n)) -- replace n by length of the vector decalred by you.
     
    Vivek Dhiman, Jul 26, 2010
    #6
  7. Sebastian Eggers

    joeblow

    Joined:
    Jul 26, 2010
    Messages:
    1
    -- Generally preferably to only use "official" IEEE libraries
    USE ieee.std_logic_1164.ALL;
    USE ieee.numeric_std.ALL;

    -- ...

    -- "natural" means >= 0. Add range to x to help synthesis
    constant NUM_BITS : natural := 8;
    signal x : natural range 0 to 2**NUM_BITS-1;
    signal vect : std_logic_vector(NUM_BITS-1 downto 0);

    -- ...

    -- By using LENGTH attribute, any change to vect is handled automatically
    -- Could also just use NUM_BITS
    x <= 2;
    vect <= std_logic_vector(to_unsigned(x, vect'LENGTH));


    The above code might look a little more complex, but by using constants and attributes, your code will be much more forgiving of changes in the future.
     
    joeblow, Jul 26, 2010
    #7
  8. Sebastian Eggers

    debayan_p

    Joined:
    Jun 2, 2009
    Messages:
    23
    I guess using IEEE official libraries is better coz they will not cause synthesis problems at a latter stage.

    There are many synthesis tools, all of them don't follow the same libraries!!

    Cheers,
    Debayan
     
    debayan_p, Aug 3, 2010
    #8
  9. Sebastian Eggers

    Fleetfoot

    Joined:
    Nov 11, 2011
    Messages:
    2
    Is there a way to do this when the integer is a generic? The LENGTH attribute doesn't apply and I need something equivalent to declare vect (in the above example) as:

    signal vect : std_logic_vector(x'HIGH-1 downto 0);

    This is legacy code that is being upgraded and the module is used in various places with different generic values from 13 to 25000 so using a single common width is not feasible.

    Thanks
    George
     
    Last edited: Nov 11, 2011
    Fleetfoot, Nov 11, 2011
    #9
  10. Sebastian Eggers

    joris

    Joined:
    Jan 29, 2009
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    Given that you are talking about generics, you could just calculate the length 'compile-time' using a log2() function (I think you'll have to write the function yourself, but that is trivial)
     
    joris, Nov 12, 2011
    #10
  11. Sebastian Eggers

    Fleetfoot

    Joined:
    Nov 11, 2011
    Messages:
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    Thanks Joris, I was hoping there was some trick that was more intrinsic but knowing there isn't saved a lot of wasted time.

    Thanks
    George
     
    Fleetfoot, Nov 21, 2011
    #11
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