Interface between floating-point and std_logic_vector signals.

[Rain]

I defined a memory with basic data type std_logic_vector. I want to
store floating-point number in it. I defined a floating-point unit
which fetches operands from the memory directly, performs fp
calculation (+/-/*) in behavioral manner, and stores the result back
to the memory. Something like this:

...
din0 = mem(addr0);
din1 = mem(addr1);
result = din0 * din1; -- behavioral description
mem(addr2) = result;
...

Where din0, din1, result are all real. Since VHDL is strict with data
type, I think such assignment between std_logic_vector and real
signals cannot be made directly. What's the possible solution to this?
How can I store real numbers in a std_logic_vector memory?

Thanks!

 

[Tricky]

I defined a memory with basic data type std_logic_vector. I want to
store floating-point number in it. I defined a floating-point unit
which fetches operands from the memory directly, performs fp
calculation (+/-/*) in behavioral manner, and stores the result back
to the memory. Something like this:

...
din0 = mem(addr0);
din1 = mem(addr1);
result = din0 * din1; -- behavioral description
mem(addr2) = result;
...

Where din0, din1, result are all real. Since VHDL is strict with data
type, I think such assignment between std_logic_vector and real
signals cannot be made directly. What's the possible solution to this?
How can I store real numbers in a std_logic_vector memory?

Thanks!

Are you trying to run this only in simulation, or on actual hardware?

If its for hardware: Real types are not synthesizable. In reality,
IEEE standard floating point numbers are just 32 bit numbers with 1
sign bit, 8 exponent bits and 23 fraction bits. So you can quite
easily read and write floating point to SLV memory, as a floating
point number is just a std_logic_vector. But forget about using reals
altogether, and either write a floating point multiplier yourself or
buy one (or get hold of a free one). Handling floating point is non-
trivial.

If its just for simulation: write a conversion function from real to
slv, and vice versa, and handle the multiplication that way. These are
functions you will have to define yourself.

 

[Andy]

Are you trying to run this only in simulation, or on actual hardware?

If its just for simulation: write a conversion function from real to
slv, and vice versa, and handle the multiplication that way. These are
functions you will have to define yourself

If this is behavioral, think about whether it makes more sense to
store items in memory as real, rather than as SLV. Depending on what
else is to be stored in the memory, it may make more sense to do the
conversion from real values in memory to SLV outputs.

There is also a new draft(?), synthesizable standard for representing
fixed and floating point values in vectors of std_logic, which are
trivial to convert to SLV. See here:

http://www.eda.org/vhdl-200x/vhdl-200x-ft/packages/Float_ug.pdf


Andy

 

[Mike Treseler]

Good point. This works also to prototype synthesis code
that does a lot of math. I can work out the
testbench interfaces and value ranges first
with such a model.

And note that I can cast 32 bit integers
or naturals directly from real and get rounding
for free (up to 2**31). Constants derived
this way can be used directly for synthesis
using quartus.

-- Mike Treseler

 

[Mike Treseler]

Andy wrote:

No, Tricky wrote it.
Sorry.