Inverted Clock in ACEX1K

[Manfred Balik]

Hello all,

I'm using an Altera ACEX1K and I want to invert my incoming clock and use
this clock outside the FPGA.
But I can't do anything with the incoming clock, if I use altclklock to use
the intern clock-network.
Please, can someone help me.

Thanks, Manfred

 

[Marc Guardiani]

If you use altclklock, you cannot invert or run the clock to any gate.
Your choices seem to be to not use altclklock on the GCLK pin or use the
other dedicated clock pin (which does not have a PLL).

Hello all,

I'm using an Altera ACEX1K and I want to invert my incoming clock and use
this clock outside the FPGA.
But I can't do anything with the incoming clock, if I use altclklock to use
the intern clock-network.
Please, can someone help me.

Thanks, Manfred

--


Marc Guardiani

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fpgaee81-at-eff-why-eye-dot-net