keypad encoder

Discussion in 'VHDL' started by leccy_eng, Mar 1, 2010.

  1. leccy_eng

    leccy_eng

    Joined:
    Mar 1, 2010
    Messages:
    1
    I'm creating a model for an electronic lock using VHDL. The input is a 4x4 hexadecimal keypad connected to a keypad encoder. I would like some guidance on writing the VHDL model for the keypad encoder.
    I found an example (forum.vtu.ac.in/~edusat/vhdl/krs/Parallel_adder_with_accumulator_AND_Keypad_scanner_Presentation.pdf) using 3x4 keypads (containing * and #) and debouncing where the approach was to draw a state graph, truth table and derive equations.

    Will I have to take a simlar approach before programming? I would preffer no debouncing as im not actually implementing the lock, is this possible?
    leccy_eng, Mar 1, 2010
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