Kudos to Aldec

Discussion in 'VHDL' started by HT-Lab, Feb 26, 2008.

  1. HT-Lab

    HT-Lab Guest

    After reading this nonsense on John Cooley latest QA:

    --------------------------------------------------------------------------
    "I tried to interview a few key members of the VHDL group since
    I had more than an intuition there was no real work done on VHDL
    anymore. I got no such confirmation indeed (mostly a silence),
    but certainly nothing denying this either!

    So the not politically correct question to Dennis Brophy would be:

    "When will the industry pronounce VHDL officially dead?"

    To date, our mainstream designing language is still VHDL due to
    our geographical situation (in Europe) but I can't wait until
    customers switch to System Verilog."
    --------------------------------------------------------------------------

    I was happy to read the Riviera 2008.02 press release:


    VHDL 2007 Support

    Riviera-PRO 2008.02 supports many features of the VHDL standard draft (IEEE
    P1076-2007/D4.0), recently approved by Accellera. Constructs such as new
    data types, subprograms and operators, matching case statement, signal
    expressions in port maps and delimited comments are just some of the latest
    enhancements. The addition of these new VHDL constructs makes Riviera-PRO
    one the most advanced mixed language VHDL simulators on the market.


    I can only say kudos to Aldec!!

    Hans
    www.ht-lab.com
     
    HT-Lab, Feb 26, 2008
    #1
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