Lazy man's testbench

Discussion in 'VHDL' started by Kenneth Brun Nielsen, May 14, 2009.

  1. A testbench, that reads input levels from columns in an input file,
    and writes outputs to another file, must be a widely used block(?).

    Does any of you have (a link to) a template I can use? Or do I have to
    spend the entire day coding one?

    Best regards,
    Kenneth
    Kenneth Brun Nielsen, May 14, 2009
    #1
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  2. Kenneth Brun Nielsen wrote:
    > A testbench, that reads input levels from columns in an input file,
    > and writes outputs to another file, must be a widely used block(?).


    If I already have a device model,
    and an appropriate testbench, I could collect
    such files from my simulator.
    Writing the model and testbench is the problem,
    and there is no generic solution.

    Unless I am feeding a device tester,
    I have no need of such "test vector" files.
    If you do, google a bit:
    http://www.actel.com/documents/TestVector_AN.pdf

    > Do any of you have (a link to) a template I can use? Or do I have to
    > spend the entire day coding one?


    It might take more than a day.

    -- Mike Treseler
    Mike Treseler, May 14, 2009
    #2
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  3. On 14 Maj, 19:39, Mike Treseler <> wrote:
    > Kenneth Brun Nielsen wrote:
    > > A testbench, that reads input levels from columns in an input file,
    > > and writes outputs to another file, must be a widely used block(?).

    >
    > If I already have a device model,
    > and an appropriate testbench, I could collect
    > such files from my simulator.
    > Writing the model and testbench is the problem,
    > and there is no generic solution.
    >
    > Unless I am feeding a device tester,
    > I have no need of such "test vector" files.
    > If you do, google a bit:http://www.actel.com/documents/TestVector_AN.pdf


    Thanks. I'm actually using this for device test vector generation, so
    the link is highly relevant.

    Best regards,
    Kenneth
    Kenneth Brun Nielsen, May 19, 2009
    #3
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