LFSR

Discussion in 'VHDL' started by mn19, Jun 12, 2007.

  1. mn19

    mn19 Guest

    Hi,

    I'm searching for a VHDL implementation of a LFSR modulo 2 divisor to
    calculate the remainder of a polynomial division, with one bit per
    clock serial input and the remainder in output.

    Can someone send me an example of the VHDL code?

    Thank you.
     
    mn19, Jun 12, 2007
    #1
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  2. Mike Treseler, Jun 12, 2007
    #2
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