logic_std and multiply and array index

P

Pascal Peyremorte

Hello,

Please, be indulgent : french beginner's questions...


1)
I have an array of 16 bits wide "memory" :

type TCOEFS is array (0 to 31) of std_logic_vector (15 downto 0);
signal COEFS : TCOEFS;

The index to acces the array is received by another part of the code,
and I declared it as :

signal RxChannelNum : std_logic_vector (4 downto 0);
with somewhere :
RxChannelNum <= MII_RxD(0) & RxCmdeL;

but I cannot find how to use a std_logic_vector as an array index, so I
wrote :

variable COEF : std_logic_vector (15 downto 0);

-- COEF <= COEFS(RxChannelNum );
case RxChannelNum is
when "00000" => COEF := COEFS(0);
when "00001" => COEF := COEFS(1);
when "00010" => COEF := COEFS(2);
when "00011" => COEF := COEFS(3);
when "00100" => COEF := COEFS(4);
when "00101" => COEF := COEFS(5);
when "00110" => COEF := COEFS(6);
when "00111" => COEF := COEFS(7);
when "01000" => COEF := COEFS(8);
when "01001" => COEF := COEFS(9);
when "01010" => COEF := COEFS(10);
when "01011" => COEF := COEFS(11);
when "01100" => COEF := COEFS(12);
when "01101" => COEF := COEFS(13);
when "01110" => COEF := COEFS(14);
when "01111" => COEF := COEFS(15);
when "10000" => COEF := COEFS(16);
when "10001" => COEF := COEFS(17);
when "10010" => COEF := COEFS(18);
when "10011" => COEF := COEFS(19);
when "10100" => COEF := COEFS(20);
when "10101" => COEF := COEFS(21);
when "10110" => COEF := COEFS(22);
when "10111" => COEF := COEFS(23);
when "11000" => COEF := COEFS(24);
when "11001" => COEF := COEFS(25);
when "11010" => COEF := COEFS(26);
when "11011" => COEF := COEFS(27);
when "11100" => COEF := COEFS(28);
when "11101" => COEF := COEFS(29);
when "11110" => COEF := COEFS(30);
when "11111" => COEF := COEFS(31);
when others => COEF := x"0000";
end case;

I think it is not very good, isn't it ? ;-(((
How should I write :
COEF <= COEFS(RxChannelNum); ?

As RxChannelNum will be always defined, must I use another type
(std_bit_vector ?) ???

-----------------------------------------------------

2) I have the same thing of problem with a multiply.
The two values are defined as std_logic_vector (15 downto 0);

(One is COEF, just above, and the other is ECHANT inputed through pins)

I have to do :

signal Amplitude : std_logic_vector (31 downto 0);
Amplitude <= ECHANT * COEF;

As I cannot found how to convert both std_logic_vector in integer, I
found a multiply algorithm on internet (mult_package.vhd) and wrote :
Amplitude <= my_mult(ECHANT,COEF);

Is it the right way or am I wrong ?
Some of Lattice's FPGAs implement multiply blocks, but I am not sure the
multiply function would be reconized and rightly synthetized...


I have not realy understood how to choose TYPES, enabling mapping to
pins, simulating, synthesis, maths usages, etc...
Do you now any website explaining that ?

Thank you very much.
Pascal Peyremorte
 
M

Mike Treseler

Pascal said:
.. what about the multiply

The conversion is the same.

"howto" choose types ?

Everybody's different. Here's mine.

for bit : std_ulogic
for internal vector : unsigned
for rollover counter : unsigned(3 downto 0)
for custom counter : natural range 0 to 15
for top entity vector ports: std_logic_vector

-- Mike Treseler
 
P

Pascal Peyremorte

Mike Treseler a écrit :
The conversion is the same.

"howto" choose types ?

Everybody's different. Here's mine.

for bit : std_ulogic
for internal vector : unsigned
for rollover counter : unsigned(3 downto 0)
for custom counter : natural range 0 to 15
for top entity vector ports: std_logic_vector

-- Mike Treseler

Hi, Mike

Thank you very much.
I will try to find more about all that, about their limitations, tips
and tricks. Large enough to fill some ends of night !

Pascal
 
C

charles.elias

Pascal,

Here is a simple lookup table that is (indirectly) indexed using a
std_logic_vector. It is easier to implement compared to using a case
statement.

--===========================================================
library IEEE;
use IEEE.STD_LOGIC_1164.all;
use ieee.numeric_std.all;
--===========================================================
ENTITY look_up IS
GENERIC ( addr_width : positive := 3;
tout_width : positive := 8 );
PORT ( addr : in std_logic_vector( addr_width - 1 downto 0 );
tout : out std_logic_vector( tout_width - 1 downto 0 ));
END look_up;

ARCHITECTURE archlook_up OF look_up IS


subtype table_rng is natural range 0 to 2**addr_width - 1;
type ttable is array( table_rng ) of std_logic_vector( tout_width -
1 downto 0 );

constant table : ttable := ( "1000000", --0
"0100000", --1
"0010000", --2
"0001000", --3
"0000100", --4
"0000010", --5
"0000001", --6
"0000000" --7
);
BEGIN

tout <= table( to_integer( unsigned( addr ) ) );

END archlook_up;
 
P

Pascal Peyremorte

(e-mail address removed) a écrit :
Pascal,

Here is a simple lookup table that is (indirectly) indexed using a
std_logic_vector. It is easier to implement compared to using a case
statement.

--===========================================================
library IEEE;
use IEEE.STD_LOGIC_1164.all;
use ieee.numeric_std.all;
--===========================================================
ENTITY look_up IS
GENERIC ( addr_width : positive := 3;
tout_width : positive := 8 );
PORT ( addr : in std_logic_vector( addr_width - 1 downto 0 );
tout : out std_logic_vector( tout_width - 1 downto 0 ));
END look_up;

ARCHITECTURE archlook_up OF look_up IS


subtype table_rng is natural range 0 to 2**addr_width - 1;
type ttable is array( table_rng ) of std_logic_vector( tout_width -
1 downto 0 );

constant table : ttable := ( "1000000", --0
"0100000", --1
"0010000", --2
"0001000", --3
"0000100", --4
"0000010", --5
"0000001", --6
"0000000" --7
);
BEGIN

tout <= table( to_integer( unsigned( addr ) ) );

END archlook_up;

Thank you very much, Charles.
I will try that.

Pascal Peyremorte
 

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