Hello everyone...
I am hoping I'll find somebody willing to help with a vhdl problem, my teacher hasn’t really taught me a thing, but I've learned the basic by myself,
and he want me to create a vhdl program that tests logical gates of two inputs...and if the truth table of any (OR, AND, NOR, AND, XOR) is satisfied ou
tput 0,1,2,3,4 or 5 in a 4 bit number. and if neither is satisfied, output 8
this should be "wrapped" in a while loop that keeps track of an enable variable
I know what the logic have to do, I could write this program if it were for C, but is my first program for vhdl and I just don't know how to start =S..if some
one could set me up with...lets say the OR gate, I would REALLY apreciate it or any kind of clue to how to start
Thanks in advance!!
I am hoping I'll find somebody willing to help with a vhdl problem, my teacher hasn’t really taught me a thing, but I've learned the basic by myself,
and he want me to create a vhdl program that tests logical gates of two inputs...and if the truth table of any (OR, AND, NOR, AND, XOR) is satisfied ou
tput 0,1,2,3,4 or 5 in a 4 bit number. and if neither is satisfied, output 8
this should be "wrapped" in a while loop that keeps track of an enable variable
I know what the logic have to do, I could write this program if it were for C, but is my first program for vhdl and I just don't know how to start =S..if some
one could set me up with...lets say the OR gate, I would REALLY apreciate it or any kind of clue to how to start
Thanks in advance!!