Loops Statements going infinite?....

[Balamurugan]

I'm using Xilinx ISE.8,VHDL coding for my projects..I try to use certain loop statements such as 'For Loop', 'While loop', and also some 'Wait statements'...It seems like these stuffs work well in simulation, but I can't get the same result in hardware output of the FPGA.For example consider this,
--------------------------
IF rising_edge(clk_500ms)THEN
FOR i IN 1 TO 1000 LOOP
led <= NOT(a); --a ='1';
END LOOP;
END IF;
-------------------------
This when executed, appeared correct in simulation...But when I looked up in the output,the led seemed to glow continously...clk_500ms is a 500ms clock.So the output shouldbe visible...Why won't xilinx support these statements?...can anybody?..

 

[phw]

For details of the VHDL constructs supported by XST go to the Xilinx website and download the XST userguide (xst.pdf).

The FOR loop in your code is redundant. Why not just:

IF rising_edge(clk_500ms)THEN
led <= NOT(a); --a ='1';
END IF;

if all you want to do is toggle a LED?