Measure simulation time in VHDL.

Discussion in 'VHDL' started by harisrini@gmail.com, Mar 27, 2007.

  1. Guest

    Hello All,
    I was wondering whether there is a way to measure the simulation time
    of an event in VHDL.

    I am using modelsim simulator with the VHDL capabilites.

    To put the same question other way, is there a $time equivalent of
    verilog calls in VHDL?

    Any answers would be greatly appreciated.

    Regards
    Hariharan K Srinivasan.
    , Mar 27, 2007
    #1
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  2. Ben Jones Guest

    <> wrote in message
    news:...
    > Hello All,
    > I was wondering whether there is a way to measure the simulation time
    > of an event in VHDL.
    >
    > I am using modelsim simulator with the VHDL capabilites.
    >
    > To put the same question other way, is there a $time equivalent of
    > verilog calls in VHDL?


    The built-in VHDL function "now" (which takes no parameters) returns the
    current simulation time. Is that what you're looking for?

    Cheers,

    -Ben-
    Ben Jones, Mar 27, 2007
    #2
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  3. sathya Guest

    On Mar 27, 2:35 pm, "Ben Jones" <> wrote:
    > <> wrote in message
    >
    > news:...
    >
    > > Hello All,
    > > I was wondering whether there is a way to measure the simulation time
    > > of an event in VHDL.

    >
    > > I am using modelsim simulator with the VHDL capabilites.

    >
    > > To put the same question other way, is there a $time equivalent of
    > > verilog calls in VHDL?

    >
    > The built-in VHDL function "now" (which takes no parameters) returns the
    > current simulation time. Is that what you're looking for?
    >
    > Cheers,
    >
    > -Ben-


    hello all.. please excuse me for my silly doubt..
    im really new to VHDL. How do u find help for VHDL online...
    Could anyone please tell me how to solve this problem ?
    sathya, Mar 31, 2007
    #3
  4. On Mar 31, 7:17 pm, "sathya" <> wrote:
    > On Mar 27, 2:35 pm, "Ben Jones" <> wrote:
    >
    >
    >
    > > <> wrote in message

    >
    > >news:...

    >
    > > > Hello All,
    > > > I was wondering whether there is a way to measure the simulation time
    > > > of an event in VHDL.

    >
    > > > I am using modelsim simulator with the VHDL capabilites.

    >
    > > > To put the same question other way, is there a $time equivalent of
    > > > verilog calls in VHDL?

    >
    > > The built-in VHDL function "now" (which takes no parameters) returns the
    > > current simulation time. Is that what you're looking for?

    >
    > > Cheers,

    >
    > > -Ben-

    >
    > hello all.. please excuse me for my silly doubt..
    > im really new to VHDL. How do u find help for VHDL online...
    > Could anyone please tell me how to solve this problem ?


    By using Google :)

    Also see: www.vhdl.org/comp.lang.vhdl

    Regards
    Ajeetha, CVC
    www.noveldv.com
    Ajeetha (www.noveldv.com), Mar 31, 2007
    #4
  5. sathya wrote:

    > im really new to VHDL. How do u find help for VHDL online...


    Ask a question about VHDL.

    -- Mike Treseler
    Mike Treseler, Mar 31, 2007
    #5
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