Memory Controller for Cellular RAM + 128 word burst

[Motta]

Hello everyone! :wave:

I'm currently working on a stuedent proyect for my thesis in electronic engeneering at the University of Buenos Aires (UBA).

At the moment I am trying to design a memory controller for the Mircon MT45W8MW16BGX, part of the nexys2, kit sold at digilent.

For my design I need it to write and read as fast as possible, so therefore I decided to use the 128-word burst lenght mode.

I'm having great trouble :banghead: achieving this task, since I never did this before.
Basicly, what I'm asking is:

1) VHDL model of the Micron memory, since in the micron webpage I can only find a VERILOG model ? I don't know verilog)

2) Any controller designed for this memory, maybe by looking at an example I can get inspired :fisheye: and figure out why the hell my controller isn't working. I looked in opencores, but didn't find anything.

Since this kit (nexys2) is quite popular; and by what I gather many stuedents :guru: abroad use it, maybe someone could help me out, because they already did a memory controller.

Kind regards,

Martin :wavey:

 

[jeppe]

Hi Martin

I found this at opencore - could be useful:
http://www.opencores.org/cvsweb.shtml/opb_psram_controller/pcore/opb_psram_v1_00_a/hdl/vhdl/

The startup test of the NEXYS board might contain some hints

Jeppe

 

[Motta]

Thanks

Thanks Dude for your post, this will definitly get me started!