Modelsim: have the compile report in the transcript window ?

Discussion in 'VHDL' started by OL, Nov 24, 2006.

  1. OL

    OL Guest

    I'm new to Modelsim. Actually, I recently switched from Cadence NCsim
    to Modelsim Altera Edition (6.1d).
    In my opinion, an annoying feature on Modelsim is that the compilation
    reports is not directly displayed in the transcript window, but you have
    to right-click on the VHDL/VERILOG source > Compile > Compile Report...
    Is there a way to integrate the compiler report into the transcript
    window ?
     
    OL, Nov 24, 2006
    #1
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  2. OL

    OL Guest

    OL wrote:
    > I'm new to Modelsim. Actually, I recently switched from Cadence
    > NCsim to Modelsim Altera Edition (6.1d).
    > In my opinion, an annoying feature on Modelsim is that the
    > compilation reports is not directly displayed in the transcript window,
    > but you have to right-click on the VHDL/VERILOG source > Compile >
    > Compile Report...
    > Is there a way to integrate the compiler report into the transcript
    > window ?


    OK, forget it. I found the option in:
    Project Settings > Display compiler output...
     
    OL, Nov 24, 2006
    #2
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