Modelsim SE Simulation Question

Discussion in 'VHDL' started by Simon Heinzle, Jul 19, 2006.

  1. Hi comp.lang.vhdl Reader!

    Following problem: after simulating for quite a while, I often realize that
    I forgot to add some important signals to the wave window.

    Normal procedure then is e.g. "restart; run 1 ms", which takes quite some
    time, altough neither the input vectors nor the circuit is altered.

    I just found out that there exist checkpoints ("checkpoint filename" to
    create a checkpoint, "restore filename" to go back to that saved state), but
    that cannot be the final solution.

    Is there a better way to speed up/recover the missing signals in such a
    situation?

    Thanks,
    Simon
    Simon Heinzle, Jul 19, 2006
    #1
    1. Advertising

  2. "Simon Heinzle" <> writes:

    > Hi comp.lang.vhdl Reader!
    >
    > Following problem: after simulating for quite a while, I often realize that
    > I forgot to add some important signals to the wave window.
    >


    I do a "log -r /*" before running the sim then all the data is logged,
    ready for me to add it to the wave window.

    Obviously if you are doing enormous designs, this may well eat your
    harddisk, but it works fine on our video-processing designs, even on
    whole-frame simulations.

    Cheers,
    Martin

    --

    TRW Conekt - Consultancy in Engineering, Knowledge and Technology
    http://www.trw.com/conekt
    Martin Thompson, Jul 19, 2006
    #2
    1. Advertising

  3. Simon Heinzle

    Guest


    > I do a "log -r /*" before running the sim then all the data is logged,
    > ready for me to add it to the wave window.
    >
    > Obviously if you are doing enormous designs, this may well eat your
    > harddisk, but it works fine on our video-processing designs, even on
    > whole-frame simulations.
    >


    Hi Martin,

    what kind of whole-frame simulation are you talking about, DVI ?

    How do you stimulate your design ? With text files, bin files
    which include "real" image data or just "free" data ?

    I am asking because I am also trying to perform whole-frame simulations
    for a DVI application.

    Rgds
    André
    , Jul 20, 2006
    #3
  4. Thanks!

    Cheers,
    Simon


    "Martin Thompson" <> wrote in message
    news:...
    > "Simon Heinzle" <> writes:
    >
    >> Hi comp.lang.vhdl Reader!
    >>
    >> Following problem: after simulating for quite a while, I often realize
    >> that
    >> I forgot to add some important signals to the wave window.
    >>

    >
    > I do a "log -r /*" before running the sim then all the data is logged,
    > ready for me to add it to the wave window.
    >
    > Obviously if you are doing enormous designs, this may well eat your
    > harddisk, but it works fine on our video-processing designs, even on
    > whole-frame simulations.
    >
    > Cheers,
    > Martin
    >
    > --
    >
    > TRW Conekt - Consultancy in Engineering, Knowledge and Technology
    > http://www.trw.com/conekt
    >
    Simon Heinzle, Jul 20, 2006
    #4
  5. "" <> writes:

    > > I do a "log -r /*" before running the sim then all the data is logged,
    > > ready for me to add it to the wave window.
    > >
    > > Obviously if you are doing enormous designs, this may well eat your
    > > harddisk, but it works fine on our video-processing designs, even on
    > > whole-frame simulations.
    > >

    >
    > Hi Martin,
    >
    > what kind of whole-frame simulation are you talking about, DVI ?
    >


    No, it's for an automotive image-processing application. We generally
    work with VGA sensors. See this for more details:
    http://www.conekt.net/docs/LDW V1.0.pdf

    > How do you stimulate your design ? With text files, bin files
    > which include "real" image data or just "free" data ?
    >


    I take PGM (text format, easy to read) files, for which I have a VHDL
    reader, and then feed them into the simulation via a model of the
    camera. The PGM files either come from our real-world logged video
    stream, along with the "right-answers" from the SW-based development
    code, or from synthetic images, then I make up the right-answers
    myself :)

    > I am asking because I am also trying to perform whole-frame simulations
    > for a DVI application.
    >


    What resolution?

    Cheers,
    Martin

    --

    TRW Conekt - Consultancy in Engineering, Knowledge and Technology
    http://www.trw.com/conekt
    Martin Thompson, Jul 21, 2006
    #5
  6. Simon Heinzle

    Bill Mills Guest

    For collecting sim data for post-processing or viewing, try a .do
    script that captures the signals of interest only on a clock or strobe
    that you define:

    # Run this .do file before you vsim & run.

    # keep going on an error
    onerror {resume}

    # !!! The first signal added is STROBE 0 !!!!
    add list -width 7 -label dds_clk /modulator_inst/dds_clk

    # See all the "-notrigger" below?
    # W/o this switch, any transition of any of the signals
    # causes the list to be updated.
    # But this script only updates the list when dds_clk changes!
    add list -notrigger -dec -width 10 -label accu_gmsk_out
    /modulator_inst/accu_gmsk_out
    add list -notrigger -unsigned -label mod_out /modulator_inst/mod_out
    add list -notrigger -dec -label sine /modulator_inst/nco_sin_tp
    add list -notrigger -dec -label cosine /modulator_inst/nco_cos_tp
    add list -notrigger -label startpwcen /modulator_inst/startpwcen
    add list -notrigger -label stoppwcen /modulator_inst/stoppwcen
    add list -notrigger -unsigned -label i_addr /modulator_inst/i_addr
    add list -notrigger -unsigned -label q_addr /modulator_inst/q_addr
    add list -notrigger -dec -label delta_i /modulator_inst/i_out
    add list -notrigger -dec -label delta_q /modulator_inst/q_out

    # Configure the first signal as the strobe.
    configure list -usestrobe 0
    configure list -strobestart {0 ps} -strobeperiod {0 ps}
    configure list -delta none

    Have fun!
    Bill
    Bill Mills, Jul 25, 2006
    #6
    1. Advertising

Want to reply to this thread or ask your own question?

It takes just 2 minutes to sign up (and it's free!). Just click the sign up button to choose a username and then you can ask your own questions on the forum.
Similar Threads
  1. Manfred Balik

    VHDL Simulation in ModelSim

    Manfred Balik, Jul 15, 2003, in forum: VHDL
    Replies:
    0
    Views:
    1,723
    Manfred Balik
    Jul 15, 2003
  2. Ouadid
    Replies:
    7
    Views:
    10,193
    Jim Wu
    Dec 18, 2003
  3. hansman
    Replies:
    3
    Views:
    2,876
    hansman
    Jan 30, 2004
  4. viswanath

    error in modelsim simulation

    viswanath, Apr 22, 2004, in forum: VHDL
    Replies:
    4
    Views:
    1,724
    viswanath
    Apr 25, 2004
  5. ALuPin
    Replies:
    13
    Views:
    6,359
    mouna
    Nov 27, 2008
Loading...

Share This Page