Multiple For Loops?

[pinod01]

To all,

I've been struggling to find out whether it is possible to create
multiple for loops (actually a two-level version) in VHDL properly that
is synthesizable? I don't really have any good examples and would
appreciate anyone giving me one - specifically if you're trying to
access elements from a multi-dimensional array. I'd like to inplement
the following:

for I in 0 to 3 loop
for J in 0 to 3 loop
Z(I,J) <= A(I,J);
end loop;
end loop;

Is this possible?

Cheers,
Pino

 

[john Doef]

(e-mail address removed) a écrit :

To all,

I've been struggling to find out whether it is possible to create
multiple for loops (actually a two-level version) in VHDL properly that
is synthesizable? I don't really have any good examples and would
appreciate anyone giving me one - specifically if you're trying to
access elements from a multi-dimensional array. I'd like to inplement
the following:

for I in 0 to 3 loop
for J in 0 to 3 loop
Z(I,J) <= A(I,J);
end loop;
end loop;

Is this possible?

Yes, it should be.
BTW, Z <= A is better if 0 to 3 are the bounds.

JD.