Multiple For Loops?

Discussion in 'VHDL' started by pinod01@sympatico.ca, Feb 22, 2006.

  1. Guest

    To all,

    I've been struggling to find out whether it is possible to create
    multiple for loops (actually a two-level version) in VHDL properly that
    is synthesizable? I don't really have any good examples and would
    appreciate anyone giving me one - specifically if you're trying to
    access elements from a multi-dimensional array. I'd like to inplement
    the following:

    for I in 0 to 3 loop
    for J in 0 to 3 loop
    Z(I,J) <= A(I,J);
    end loop;
    end loop;

    Is this possible?

    Cheers,
    Pino
     
    , Feb 22, 2006
    #1
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  2. john Doef Guest

    a écrit :

    > To all,
    >
    > I've been struggling to find out whether it is possible to create
    > multiple for loops (actually a two-level version) in VHDL properly that
    > is synthesizable? I don't really have any good examples and would
    > appreciate anyone giving me one - specifically if you're trying to
    > access elements from a multi-dimensional array. I'd like to inplement
    > the following:
    >
    > for I in 0 to 3 loop
    > for J in 0 to 3 loop
    > Z(I,J) <= A(I,J);
    > end loop;
    > end loop;
    >
    > Is this possible?

    Yes, it should be.
    BTW, Z <= A is better if 0 to 3 are the bounds.

    JD.
     
    john Doef, Feb 22, 2006
    #2
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