Multiplier 12 bit architecture !!!

Discussion in 'VHDL' started by charko, Apr 30, 2010.

  1. charko

    charko

    Joined:
    Apr 21, 2010
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    Hi! I want to implement a multiplier 12 bit in vhdl structural . My application needs very fast architecture but i want to know what architecture of multiplier can be used .

    Thank you very much .
     
    charko, Apr 30, 2010
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  2. charko

    jeppe

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    The best way to get a fast multiplication will be a fixed, integrated multiplier as it can be found in most FPGA's.

    But in order to get more information check this site:
    users-tima.imag.fr/cis/guyot/Cours/Oparithm/english/Multip.htm

    your welcome
     
    jeppe, May 6, 2010
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  3. charko

    charko

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    OK!Thank you very much for your help
    Charko
     
    charko, May 7, 2010
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