multiplier one fixed value other user defined

[xiibweb]

Hi,,
I am interested to write a code where one input is user defined and the
other input is fixed to some value....

for example

0X2=0
1X2=2
2X2=4
3X2=6

here two in fixed (which I want to define as fixed). and 0 , 1, 2 , 3
user defined.


This code is generated using Xilinx webpack...

================================================================
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

---- Uncomment the following library declaration if instantiating
---- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;

entity multo is
Port ( p1 : in std_logic_vector(1 downto 0);
w1 : in std_logic_vector(1 downto 0);
ou : out std_logic_vector(3 downto 0));
end multo;

architecture Behavioral of multo is

begin

ou <= w1 * p1;

end Behavioral;

================================================================

the code works fine.. but in a final result I hv to make a schmatic
symbol of the code.. and I want to keep the fixed input hidden. So the
user just can change the other input and see the results...

anybody with an answer... help me out...

thanks

John

 

[Ralf Hildebrandt]

I am interested to write a code where one input is user defined and the
other input is fixed to some value....

use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

Hint: These libraries are not recommended, because their implementation
depends on the tool. Use IEEE.Numeric_Std.ALL instead.

entity multo is
Port ( p1 : in std_logic_vector(1 downto 0);
w1 : in std_logic_vector(1 downto 0);
ou : out std_logic_vector(3 downto 0));
end multo;

architecture Behavioral of multo is

begin

ou <= w1 * p1;

end Behavioral;

If you synthesitze this, you will get a standard multiplier. Only if you
include this in a higher level component and make it clear for the
synthesis tool, that one input is fixed, you will get an efficient
implementation.
Try to use this (Numeric_Std.ALL included):

entity multo is
generic(
p1 : integer:=2 );
port (
w1 : in std_logic_vector(1 downto 0);
ou : out std_logic_vector(3 downto 0) );
end multo;

architecture Behavioral of multo is
begin

ou <= (unsigned)w1 * p1; -- signed or unsigned?

end Behavioral;

Hint: Multiplication by two is nothing more than a shift. With the
suggested approach using the generic parameter the synthesis tool is
able to see this and will infer a simple shifter.

Ralf