need help in VHDL FIR filter

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https://mail.google.com/mail/?shva=1#sent/12973821f1e908b5

please see the mail link. I need help. please guys help me. I am able to synthezise it but its not the structure which, I want could you please tell me what's is the mistake in it.

I have to drive the sel statement.

I have attached the file and please help me ....
 

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