Node contains cycle

Discussion in 'VHDL' started by TwentyFlight, Nov 27, 2010.

  1. TwentyFlight

    TwentyFlight

    Joined:
    Nov 27, 2010
    Messages:
    1
    [edit] Problem solved : in order to get rid of this problem (which is actually a combinational loop), just put the code within a clocked process.

    Hello,

    I've got this piece of code, within a process, where a signal "foo" is tested and then reassigned :

    case foo is
    when "000" => foo <= "111";
    when "001" => foo <= "101";
    ...
    ...
    end case;


    Compilation completes successfully, but Lattice gives me warnings like this : Node foo_1__un0_n contains cycle, will not be collapsed away

    What does it mean? Should I be worried about it or not? My code works fine when using a simulator.

    Thanks
    Last edited: Nov 30, 2010
    TwentyFlight, Nov 27, 2010
    #1
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