noob pls help

Joined
Jun 24, 2008
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hi everybody,
i want to activate a signal after 12 cycles and then di-activate it again. how can i do that?
i don't know many things so forgive me if i say anything wrong.
for example,
start-0-0-0-0-0-0-0-0-0-0-0-0-1-0-end

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use WORK.test_pack.all;

-- ============ Interface Description ============

entity COUNTER is

port (clock : in std_logic; -- positive edge
reset : in std_logic;

start : in std_logic; -- start process

done_count: out std_logic -- end of the process

);
end COUNTER;

architecture COUNTER_RTL of COUNTER is


-- ============ Signal Definition ============

-- ============ Data Movement ============

begin

START_COUNTER: process --( clock, reset )

begin
variable temp : integer range 0 to 12;
temp := 0;

if reset = '1' then
done_count <= '0';

elsif clock = '1' then
if start = '1' then

G1: for i in 0 to 11 loop
wait until clock = '0';
wait until clock = '1';
temp := temp +1;
end loop; -- G1

if temp = 12 then
done_count <= '1';
else done_count <= '0';
end if;

end if; --if start = '1'

end if; --if reset elsif clock'event

end process;

end COUNTER_RTL;

i tried "clock" and "reset" in sensitivity list but in that case "wait" statments weren't accepted.
 
Joined
Jun 24, 2008
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now i wrote this one, but modelsim says,
error: No feasible emtries for infix operator "+".
error: Type error resolving infix expression "+" as type ieee.std_logic_1164.std_logic_vector.
if u have a litle time take a look and help me pls
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

-- =============== Interface Description ===============

entity COUNTER_DEC is

port (clock : in std_logic; -- positive edge
reset : in std_logic;

start : in std_logic; -- start process

done_count: out std_logic -- end of the process

);
end COUNTER_DEC;

architecture COUNTER_DEC_RTL of COUNTER_DEC is


-- =============== Signal Definition ===============

signal tmp : std_logic;
signal active : std_logic;
signal counter: std_logic_vector(3 downto 0);


-- =============== Data Movement ===============

begin

START_COUNTER: process ( clock, reset )

begin

if reset = '1' then
counter <= (others => '0');
tmp <= '0';
active <= '0';

elsif (start = '1' or active = '1') then

if clock'event and clock = '1' then
counter <= (counter + '1');
else
counter <= counter;
tmp <= tmp;
end if;
active <= active xor start;
else
counter <= "0000";
tmp <= '0';
active <= '0';
end if;

if counter = "1100" then
tmp <= '1';
counter <= "0000";
active <= '0';
else
tmp <= '0';
end if;
done_count <= tmp;

end process;

end COUNTER_DEC_RTL;
 

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