Null slice? Synthesis in XST?

Discussion in 'VHDL' started by Brandon, Aug 31, 2005.

  1. Brandon

    Brandon Guest

    I'm using the following as a reference:

    http://groups.google.com/group/comp...=what is a null slice&rnum=1#906fd9fdca98a35a

    I have to perform sign extension and/or zero padding on some
    fixed-point numbers. I want to avoid writing conditions for simplicity
    so...

    This probably doesn't make much sense, but here is the code:
    <SNIP>
    -- Zero pad
    y(csum_frwidth_g-2*(dwidth_g-1)-1 downto 0) <= (others => '0');
    -- Sign extend
    y(csum_whwidth_g+csum_frwidth_g downto csum_frwidth_g+2) <= (others =>
    x(x'high) );
    </SNIP>

    Here are two possible conditions:


    -- Elaboration Condition #1 (no pad, no sign extend):
    dwidth_g := 4;
    csum_frwidth_g := 4;
    cscum_whwidth_g := 1;

    y(-3 downto 0) <= (others => '0'); -- no zero pad -> null slice?
    y(5 downto 6) <= (others => x(x'high) ); -- no sign ext -> null slice?


    -- Elaboration Condition #2 (pad, sign extend):
    dwidth_g := 4;
    csum_frwidth_g := 8;
    cscum_whwidth_g := 5;

    y(1 downto 0) <= (others => '0'); -- zero pad
    y(13 downto 10) <= (others => x(x'high) ); -- sign extend


    This compiles, but is it okay to write this way for synthesis tools,
    especially XST?

    Thanks,
    -Brandon
    Brandon, Aug 31, 2005
    #1
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