Opening for Microprocessor RLM-Engineer

Discussion in 'VHDL' started by subhendu, Nov 30, 2007.

  1. subhendu

    subhendu Guest

    Post: Processor RLM Engineer

    Job Description:
    The Candidate Needs to Work with the Micro Processor Development Team
    with our Client Semicon R&D Lab.

    Desired Skill Set:
    # 3+ years of active hands on experience in designing Macros for
    Processor Development or similar product Will work with Processor Unit
    Leads and other Circuit Designers to implement small ASIC like Macros
    in advanced deep submicron low power technology nodes.
    # Must be familiar with modern high-speed and low-power circuit design
    # Must be familiar with design issues in 90 nm and smaller nodes.
    # Understanding vhdl, logic and digital design concepts, clocking,
    clock phase, setup time, hold time borrowing etc
    # Transistor Level Timing Closure, implement the layout, make changes
    to layout for optimal timing
    # Physical design using modern automated place-and-route (preferably
    Cadence based) and DRC/LVS/ERC tool flows.
    # Cadence Custom Design Tools - Schematic editor, Virtuoso LE and
    virtuoso XL.

    Contact Person: Subhendu
    subhendu, Nov 30, 2007
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