Optimized comparator

Discussion in 'VHDL' started by ALuPin@web.de, Aug 24, 2005.

  1. Guest

    Hi,

    for arbitration purpose I need to store a 12 bit value
    three times.

    Then I need to compare the three registers.
    What is the best way to save ressources ?
    Is the approach shown a good one ?


    process(Rst, Clk)
    begin
    if Rst='1' then
    ls_reg0 <= (OTHERS => '0');
    ls_reg1 <= (OTHERS => '0');
    ls_equal <= '0';

    elsif rising_edge(Clk) then
    ls_equal <= '0';

    if ls_store0='1' THEN
    ls_reg0 <= DataIn;
    end if;

    if ls_store1='1' THEN
    ls_reg1 <= DataIn;
    end if;

    if ls_store2='1' THEN
    if ((ls_reg0=ls_reg1) AND (ls_reg1=DataIn)) then
    ls_equal <= '1';
    end if;
    end if;

    end if;
    end process;

    Rgds
    André
     
    , Aug 24, 2005
    #1
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  2. Zara Guest

    process(Rst,Clk)
    begin
    if Rst='1' then
    ls_reg<=(OTHERS=>'0');
    ls_cmp<='0';
    ls_equal<='0';
    elsif rising_edge(Clk) then
    ls_reg<=DataIn;
    if ls_reg=DataIn then
    ls_cmp<='1'
    ls_equal<=ls_cmp;
    else
    ls_cmp<='0';
    ls_equal<='0';
    end if;
    end if;
    end process;

    You compare anly once.

    Easy and minimum
     
    Zara, Aug 24, 2005
    #2
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  3. Guest

    No, no.

    Only if there are THREE EQUAL register values in series
    ONLY THEN I want my 'equal' signal going high.

    The question was if there is some minimum implementation for THAT.

    Rgds
    André



    Zara schrieb:

    > process(Rst,Clk)
    > begin
    > if Rst='1' then
    > ls_reg<=(OTHERS=>'0');
    > ls_cmp<='0';
    > ls_equal<='0';
    > elsif rising_edge(Clk) then
    > ls_reg<=DataIn;
    > if ls_reg=DataIn then
    > ls_cmp<='1'
    > ls_equal<=ls_cmp;
    > else
    > ls_cmp<='0';
    > ls_equal<='0';
    > end if;
    > end if;
    > end process;
    >
    > You compare anly once.
    >
    > Easy and minimum
     
    , Aug 24, 2005
    #3
  4. wrote:

    > for arbitration purpose I need to store a 12 bit value
    > three times.
    > Then I need to compare the three registers.
    > What is the best way to save ressources ?


    You can answer this question yourself by
    adding port and signal declarations and
    running a trial synthesis. Read
    the utilization stats and look at the RTL
    schematic viewer.

    > Is the approach shown a good one ?


    Only you can answer that question.
    Let's assume that your simulation
    ran as expected.

    I see no arbitration here, but
    it looks like valid synthesis code for
    two clock-enabled input registers and
    and a single bit output register,
    active whenever both input registers
    match the signal DataIn.

    Your code could be made more readable,
    but I can't think of any changes
    that would affect synthesis for the better.

    -- Mike Treseler
     
    Mike Treseler, Aug 24, 2005
    #4
  5. Zara Guest

    You don´t need to register all three values. Look again at the listing
    I sent:

    ls_reg contains the value at last transition
    ls_cmp contains the result of comparing the value at last transition
    with the vaule at one-before-last transition

    In the transition, some things are done:

    1. if value on last transition equals value now:
    a) equal is signed if value ls_cmp is signed: That gives us the
    "all three values are equal" needed
    b) ls_cmp is updated
    2. ls_reg is updated

    If you simulate it, you will see it works.
    And it is really compact.

    So, please don't SHOUT.
     
    Zara, Aug 25, 2005
    #5
  6. Guest

    Hi Zara,

    not shouting :eek:)

    Rgds
    André


    Zara schrieb:

    > You don´t need to register all three values. Look again at the listing
    > I sent:
    >
    > ls_reg contains the value at last transition
    > ls_cmp contains the result of comparing the value at last transition
    > with the vaule at one-before-last transition
    >
    > In the transition, some things are done:
    >
    > 1. if value on last transition equals value now:
    > a) equal is signed if value ls_cmp is signed: That gives us the
    > "all three values are equal" needed
    > b) ls_cmp is updated
    > 2. ls_reg is updated
    >
    > If you simulate it, you will see it works.
    > And it is really compact.
    >
    > So, please don't SHOUT.
     
    , Aug 25, 2005
    #6
  7. Guest

    I was not clear:
    With "In series " I do not mean in three consecutive clock cycles
    but when the conditions ls_store0, ls_store1, ls_store2 become
    true in series.

    Rgds
    André
     
    , Aug 25, 2005
    #7
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