R
riccardo
Hi list,
sorry for being OT. I have troubles with dependencies in a Makefile;
I have a series of $FILENAME.c $FILENAME.h files but also some other
SOMEOTHERFILENAME.h header files wich $FILENAME.c depend upon.
I'm using the line
..c.o:
$(GCC) ...
which doesn't seem to accept dependecies statements, therefore the
following doesn't bring any change
..c.o: $SOMEOTHERFILENAME.h
$(GCC) ...
The correct way could be to specify deps for each .c file separately:
$FILENAME1.c: $FILENAME1.h $SOMEOTHERFILENAME.h
$(GCC) ...
Is there a more compact and jet portable way of doing this?
Thankx and sorry again for being ot!
R
sorry for being OT. I have troubles with dependencies in a Makefile;
I have a series of $FILENAME.c $FILENAME.h files but also some other
SOMEOTHERFILENAME.h header files wich $FILENAME.c depend upon.
I'm using the line
..c.o:
$(GCC) ...
which doesn't seem to accept dependecies statements, therefore the
following doesn't bring any change
..c.o: $SOMEOTHERFILENAME.h
$(GCC) ...
The correct way could be to specify deps for each .c file separately:
$FILENAME1.c: $FILENAME1.h $SOMEOTHERFILENAME.h
$(GCC) ...
Is there a more compact and jet portable way of doing this?
Thankx and sorry again for being ot!
R