Passing Arrays Via Port Map

Discussion in 'VHDL' started by lukster@gmail.com, Mar 24, 2008.

  1. Guest

    Hey everyone,

    I have the following type/signal:

    type nums is array(0 to 3) of std_logic_vector(4 downto 0);
    SIGNAL numbers :nums;

    I'm trying to do the following:

    BG_0: BG port map (pixel_row, pixel_column, m_cursor_row,
    m_cursor_col, rom_addr,
    cursor, numbers);

    However, Quartus II is giving me the following error:

    type of identifier "numbers" does not agree with its usage as nums
    type

    my BG package looks like this:

    PACKAGE BG_P IS
    type nums is array(0 to 3) of std_logic_vector(4 downto 0);
    COMPONENT BG IS

    PORT(pixel_row, pixel_column : IN STD_LOGIC_VECTOR(9 DOWNTO 0);
    m_cursor_row, m_cursor_col : STD_LOGIC_VECTOR(9 DOWNTO 0);
    rom_addr : OUT STD_LOGIC_VECTOR(16 downto 0);
    cursor : OUT STD_LOGIC;
    numbers: OUT num
    );
    END COMPONENT BG;
    END PACKAGE BG_P;

    if anyone can offer any insight it would be greatly appreciated, thank
    you.
    , Mar 24, 2008
    #1
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  2. wrote:

    > type of identifier "numbers" does not agree
    > with its usage as nums type


    Maybe you said numbers instead of numbers(0) etc.
    in the architecture.

    > if anyone can offer any insight it would be greatly appreciated


    I get better error messages from vcom than
    I do from quartus.


    -- Mike Treseler
    Mike Treseler, Mar 24, 2008
    #2
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  3. KJ Guest

    <> wrote in message
    news:...
    > Hey everyone,
    >
    > I have the following type/signal:
    >
    > type nums is array(0 to 3) of std_logic_vector(4 downto 0);
    > SIGNAL numbers :nums;
    >

    <snip>
    > However, Quartus II is giving me the following error:
    >
    > type of identifier "numbers" does not agree with its usage as nums
    > type
    >
    > my BG package looks like this:
    >
    > PACKAGE BG_P IS
    > type nums is array(0 to 3) of std_logic_vector(4 downto 0);

    <snip>
    > if anyone can offer any insight it would be greatly appreciated, thank
    > you.


    That's what is meant by 'strong typing'. You've defined two technically
    different types, one inside your package and one inside the architecture
    that you're using to instantiate the entity. Although they look the same,
    they are not the same exact type which is the reason for the error.

    To fix it, you need to
    1. get rid of the type definition in the architecture (i.e. before "signal
    numbers nums")
    2a. Change to "signal numbers: work.bg_p.nums" or
    2b. Add a "use work.bg_p.all" before the architecture (or before the
    entity).

    Just because you define two types that look identical, does not make them
    the same type.

    KJ
    KJ, Mar 24, 2008
    #3
  4. schrieb:
    > PACKAGE BG_P IS
    > type nums is array(0 to 3) of std_logic_vector(4 downto 0);
    > COMPONENT BG IS
    >
    > PORT(pixel_row, pixel_column : IN STD_LOGIC_VECTOR(9 DOWNTO 0);
    > m_cursor_row, m_cursor_col : STD_LOGIC_VECTOR(9 DOWNTO 0);
    > rom_addr : OUT STD_LOGIC_VECTOR(16 downto 0);
    > cursor : OUT STD_LOGIC;
    > numbers: OUT num


    You should have nums here.

    Tom
    Thomas Reinemann, Mar 25, 2008
    #4
  5. Guest

    Thank you kindly for the input guys -- although I'm encountering
    another issue now...

    in my core.vhd I have the following (as suggested by KJ)

    USE WORK.BG_P.all;
    SIGNAL numbers :nums;


    Now, in BG.vhd I have:

    ENTITY BG IS
    PORT(..., numbers : OUT nums );
    END BG;

    ARCHITECTURE b OF BG IS
    type nums is array(0 to 3) of std_logic_vector(4 downto 0);
    .....
    BEGIN
    ....
    END b;

    However, on the ENTITY line I'm getting the following error: "VHDL
    error at bg.vhd(18): object "nums" is used but not declared". I can
    understand as I'm using "nums" before it's defined in the
    architecture. I've tried adding the the definition everywhere in the
    VHDL file but it either doesn't compile or I get the same error. Seems
    like I'm in a catch 22 right now...

    Thank again you guys are saving me days of headache :)
    , Mar 25, 2008
    #5
  6. Guest

    Actually guys I was able to figure it out :)

    in BG.VHD I added "use WORK.BG_P.nums;" -- seems kinda circular but it
    does trick :)

    thank you kindly again,
    , Mar 25, 2008
    #6
  7. KJ Guest

    <> wrote in message
    news:...
    > Actually guys I was able to figure it out :)
    >
    > in BG.VHD I added "use WORK.BG_P.nums;" -- seems kinda circular but it
    > does trick :)
    >
    > thank you kindly again,


    The definition of 'nums' belongs in the package, and no place else. In
    particular it does not belong inside architecture b of BG as you showed in
    your previous post and the likely reason for you thinking it is somewhat
    circular reference. When you want to define a new data type that will be
    used on the interface to some design (i.e. it is a signal in the entity),
    then the basic structure is the following:

    package my_package is
    type my_type ...
    end package my_package;
    ------------------------------------
    use work.my_package.all;
    entity my_widget is
    some_signal_in in: my_type;
    some_signal_out: my_type;
    ...
    end my_widget;
    architecture blah_blah of my_widget is
    begin
    some_signal_out <= some_signal_in;
    end blah_blah;
    --------------------------------------
    use work.my_package.all;
    entity top_level is
    some_top_signal_in in: my_type;
    some_top_signal_out: my_type;
    end top_level;
    architecture rtl of top_level is
    begin
    The_Widget : entity work.my_widget
    port map(...);
    end rtl;

    Notice that the type definition only appears one place (inside the package)
    and that wherever you want to USE signals of that type, you either include a
    VHDL use statement to make the type visible, or spell out the 'path name'
    for that type (i.e. if you don't put a VHDL 'use' statement, then you can
    still reference the type as "work.my_package.my_type"

    Kevin Jennings
    KJ, Mar 25, 2008
    #7
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