PC => FPGA, Parallel Port Communication

Discussion in 'VHDL' started by Rodrigo Ribeiro, Jun 5, 2007.

  1. Hi,

    Does anybody have an example of a bidirectional communication protocol
    between the parallel port (EPP Mode) and the FPGA?

    I need to work with digital image processing on the FPGA and need to
    estabilish this communication to transfer data from the PC to be
    processed on the FPGA.

    I work with Quartus II Web Edition and a Altera Cyclone.


    Thanks.
    Rodrigo Ribeiro, Jun 5, 2007
    #1
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  2. Rodrigo Ribeiro

    Dave Higton Guest

    In message <>
    Rodrigo Ribeiro <> wrote:

    > Hi,
    >
    > Does anybody have an example of a bidirectional communication protocol
    > between the parallel port (EPP Mode) and the FPGA?
    >
    > I need to work with digital image processing on the FPGA and need to
    > estabilish this communication to transfer data from the PC to be
    > processed on the FPGA.


    Why on earth, in 2007, are you using a parallel port?

    Dave
    Dave Higton, Jun 5, 2007
    #2
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  3. Rodrigo Ribeiro a écrit :
    > Hi,
    >
    > Does anybody have an example of a bidirectional communication protocol
    > between the parallel port (EPP Mode) and the FPGA?
    >
    > I need to work with digital image processing on the FPGA and need to
    > estabilish this communication to transfer data from the PC to be
    > processed on the FPGA.


    You would be better to use a fast transfer media like USB, ethernet, FireWire...

    Pascal
    Pascal Peyremorte, Jun 5, 2007
    #3
  4. Hi

    I'm using a XESS XS40 board that has parallel port communication with
    the PC. For a little design that I made, I have a little example of
    unidirectional communication (PC to FPGA Board). Maybe you can adapt
    it or modify it to be bidirectional and improve it.

    If you are interested, e-mail me.

    Hernán Sánchez
    hernan dot sanchez at iname dot com


    On 5 jun, 07:11, Rodrigo Ribeiro <> wrote:
    > Hi,
    >
    > Does anybody have an example of a bidirectional communication protocol
    > between the parallel port (EPP Mode) and the FPGA?
    >
    > I need to work with digital image processing on the FPGA and need to
    > estabilish this communication to transfer data from the PC to be
    > processed on the FPGA.
    >
    > I work with Quartus II Web Edition and a Altera Cyclone.
    >
    > Thanks.
    =?iso-8859-1?B?SGVybuFuIFPhbmNoZXo=?=, Jun 8, 2007
    #4
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