plz ...Verilog-HDL an up/down BCD counter

Discussion in 'VHDL' started by SQU, Apr 27, 2009.

  1. SQU

    SQU

    Joined:
    Apr 27, 2009
    Messages:
    1
    Hi

    plz help me how can i write

    verilog-HDL an up/down BCD counter

    i make 4 function for up
    and 4 for down

    but how can i write them in verilog-HDL


    can i use assign in if statement ??
    if(up==1)
    {
    assign f1= xxxxx;
    assign f2= xxxxx;
    assign f3= xxxxx;
    assign f4;= xxxxx;
    }
    if(down==1)
    assign g1= xxxxx;
    assign g2= xxxxx;
    assign g3= xxxxx;
    assign g4;= xxxxx;
    }




    plz see attachments
    i want to write Verilog-HDL for this diagram
    :-( :-(



    Thanks ....
     

    Attached Files:

    SQU, Apr 27, 2009
    #1
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  2. SQU

    JohnDuq

    Joined:
    Dec 9, 2008
    Messages:
    88
    Download ISE from Xilinx. The 'Language Templates' (light bulb on the toolbar) has some example counters. You can convert these to BCD.

    Make sure you go through the tutorials on ISE, otherwise it is a tough learning curve. Xilinx has some decent examples on their website too; I've only looked through the VHDL but there may be some Verilog too. I'm sure you can find them in other places on the web too.

    Have fun learning Verilog/VHDL!

    John
     
    JohnDuq, Apr 28, 2009
    #2
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