F
Francisco Rodriguez
Hi Steve
If you directly instantiate the block ram as a component, then that's
obviously non-portable code.
But yes, you can create a VHDL process using the XST provided template
to ensure the synthesizer will infer a block ram instead of distributed
memory
if you make use of the corresponding XST option (synthesizer options->HDL
options->RAM style = block).
The VHDL templates are on the "HDL Coding Techniques" section of the XST
user guide.
As long as you use block rams by inferring them from your source,
the code will be portable to a different architecture.
Regards
Francisco
If you directly instantiate the block ram as a component, then that's
obviously non-portable code.
But yes, you can create a VHDL process using the XST provided template
to ensure the synthesizer will infer a block ram instead of distributed
memory
if you make use of the corresponding XST option (synthesizer options->HDL
options->RAM style = block).
The VHDL templates are on the "HDL Coding Techniques" section of the XST
user guide.
As long as you use block rams by inferring them from your source,
the code will be portable to a different architecture.
Regards
Francisco