Post Route Simulation

Discussion in 'VHDL' started by sridar, Jun 23, 2008.

  1. sridar

    sridar

    Joined:
    Jun 5, 2007
    Messages:
    51
    Hello Everybody,
    How can i perform the post-route simulation of the VHDL code using sonata tool from Symphony EDA.
    I am using xilinx Spartan-3E device.
     
    sridar, Jun 23, 2008
    #1
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