PRBS for bit error rate tester

Discussion in 'VHDL' started by prasad.vinayak@gmail.com, Jul 17, 2006.

  1. Guest

    I need to generate a pseudo-random data pattern for bit error rate
    testing based on the polynomials 1 + x6, 1 + x18
    + x23, and 1 + x28 + x31. I will need to generate these 64 and 128 bits
    wide. Please suggest some method to do this
    , Jul 17, 2006
    #1
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  2. writes:

    > I need to generate a pseudo-random data pattern for bit error rate
    > testing based on the polynomials 1 + x6, 1 + x18
    > + x23, and 1 + x28 + x31. I will need to generate these 64 and 128 bits
    > wide. Please suggest some method to do this


    http://www.easics.com/webtools/crctool


    Kai
    --
    Kai Harrekilde-Petersen <khp(at)harrekilde(dot)dk>
    Kai Harrekilde-Petersen, Jul 17, 2006
    #2
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