Problem with SLL: "sll can not have such operands in this context" and bit-testing

Discussion in 'VHDL' started by Frank Buss, Jul 1, 2006.

  1. Frank Buss

    Frank Buss Guest

    I've defined this signals:

    signal accu : std_logic_vector(31 downto 0) := (others => '0');
    signal data : integer range 0 to 255 := 0;

    Within a process, which is triggered with like this:

    if clk'event and clk = '0' then

    I try to shift the accu (I'm trying to build a CPU) :

    accu <= accu sll data;

    But WebPACK ISE 8.1, with the service pack 3, says:

    "sll can not have such operands in this context"

    Even for this line it reports the same error:

    accu <= accu sll 1;

    How can I rotate the signal?


    I have a similiar problem with my bit-test instruction:

    z_flag <= accu(x_register);

    This produces "Wrong index type for accu.", with the same definition for
    x_register like for accu:

    signal x_register : std_logic_vector(31 downto 0) := (others => '0');

    --
    Frank Buss,
    http://www.frank-buss.de, http://www.it4-systems.de
     
    Frank Buss, Jul 1, 2006
    #1
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  2. Re: Problem with SLL: "sll can not have such operands in this context"and bit-testing

    Frank Buss wrote:

    > How can I rotate the signal?


    I would use numeric_std.rotate_left.

    Here's a usage example:
    http://home.comcast.net/~mike_treseler/sync_template.vhd

    > I have a similiar problem with my bit-test instruction:
    >
    > z_flag <= accu(x_register);
    >
    > This produces "Wrong index type for accu.", with the same definition for
    > x_register like for accu:
    >
    > signal x_register : std_logic_vector(31 downto 0) := (others => '0');


    To test a bit, you need a natural index.

    -- Mike Treseler
     
    Mike Treseler, Jul 1, 2006
    #2
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  3. Frank Buss

    Frank Buss Guest

    Mike Treseler wrote:

    > I would use numeric_std.rotate_left.
    >
    > Here's a usage example:
    > http://home.comcast.net/~mike_treseler/sync_template.vhd


    This doesn't work. The full VHDL code:

    http://www.frank-buss.de/tmp/displaytest.vhd

    ISE WebPack says:

    Line 748. rotate_left can not have such operands in this context.

    if I use the rotate_left. As a workaround I have used a counter and sliced
    vector access to simulate sll and the bit test function, which works, but
    which is slow.

    It is my first VHDL program, so I would appreciate any other idea how to
    improve it as well. It needs about 20,000 gates, which is nearly as much as
    the 6809 implementation from OpenCores, so I think there is much to
    improve, because my CPU has much less functionality than the 6809 :)

    > To test a bit, you need a natural index.


    What is a natural index and how can I convert a signal to a natural index?

    Another problem with my code: Looks like "char <= conv_integer(accu(7
    downto 0));" or "accu <= accu + 1;" limits the range to 0..127, because the
    charset, which is printed by the assembler program, displays the first 128
    characters twice.

    --
    Frank Buss,
    http://www.frank-buss.de, http://www.it4-systems.de
     
    Frank Buss, Jul 1, 2006
    #3
  4. Re: Problem with SLL: "sll can not have such operands in this context"and bit-testing

    Frank Buss wrote:
    > Mike Treseler wrote:
    >
    >> I would use numeric_std.rotate_left.
    >>
    >> Here's a usage example:
    >> http://home.comcast.net/~mike_treseler/sync_template.vhd

    >
    > This doesn't work. The full VHDL code:
    >
    > http://www.frank-buss.de/tmp/displaytest.vhd


    It works if you declare unsigned types.

    library IEEE;
    use IEEE.STD_LOGIC_1164.ALL;
    -- use IEEE.STD_LOGIC_ARITH.ALL;
    -- use IEEE.STD_LOGIC_UNSIGNED.ALL;
    use IEEE.NUMERIC_STD.ALL;

    http://ghdl.free.fr/ghdl/IEEE-library-pitfalls.html

    > What is a natural index and how can I convert a signal to a natural index?


    0, 1, 2 ...

    This is a FAQ. Google a bit.

    >
    > Another problem with my code: Looks like "char <= conv_integer(accu(7
    > downto 0));" or "accu <= accu + 1;" limits the range to 0..127, because the
    > charset, which is printed by the assembler program, displays the first 128
    > characters twice.


    use IEEE.NUMERIC_STD.ALL;

    http://www.csee.umbc.edu/help/VHDL/packages/numeric_std.vhd


    -- Mike Treseler
     
    Mike Treseler, Jul 1, 2006
    #4
  5. Frank Buss

    Frank Buss Guest

    Mike Treseler wrote:

    > It works if you declare unsigned types.
    >
    > library IEEE;
    > use IEEE.STD_LOGIC_1164.ALL;
    > -- use IEEE.STD_LOGIC_ARITH.ALL;
    > -- use IEEE.STD_LOGIC_UNSIGNED.ALL;
    > use IEEE.NUMERIC_STD.ALL;
    >
    > http://ghdl.free.fr/ghdl/IEEE-library-pitfalls.html


    Thanks, I've corrected it, now rotate_left and rotate_right works.

    >> What is a natural index and how can I convert a signal to a natural index?

    >
    > 0, 1, 2 ...
    >
    > This is a FAQ. Google a bit.


    I've corrected this, too, with a subtype of the form "subtype byte is
    natural range 0 to 255;" for all signals which needs this type, now the
    program looks more clear and I can access a bit of a signal with a signal
    as index.

    >> Another problem with my code: Looks like "char <= conv_integer(accu(7
    >> downto 0));" or "accu <= accu + 1;" limits the range to 0..127, because the
    >> charset, which is printed by the assembler program, displays the first 128
    >> characters twice.

    >
    > use IEEE.NUMERIC_STD.ALL;
    >
    > http://www.csee.umbc.edu/help/VHDL/packages/numeric_std.vhd


    Thanks, but the problem was, that the vdu module, which I used, has only
    128 characters, but the characters above 128 are calculated block graphics,
    if the 7th bit in the attribute RAM is set :)

    The new version:

    http://www.frank-buss.de/tmp/displaytest2.vhdl

    Now the last problem is to optimize it to synthesize not so many gates. Any
    ideas?

    --
    Frank Buss,
    http://www.frank-buss.de, http://www.it4-systems.de
     
    Frank Buss, Jul 1, 2006
    #5
  6. Frank Buss

    Duane Clark Guest

    Re: Problem with SLL: "sll can not have such operands in this context"and bit-testing

    Frank Buss wrote:
    >
    > I have a similiar problem with my bit-test instruction:
    >
    > z_flag <= accu(x_register);
    >
    > This produces "Wrong index type for accu.", with the same definition for
    > x_register like for accu:
    >
    > signal x_register : std_logic_vector(31 downto 0) := (others => '0');
    >


    Assuming you are using the numeric_std package, you could write that as:
    z_flag <= accu(to_integer(unsigned(x_register)));
    A bit cumbersome perhaps. If you are using x_register in many places for
    a similar purpose, create an intermediate integer variable.
     
    Duane Clark, Jul 1, 2006
    #6
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