process runs 1 clock cycle behind rest of code

Discussion in 'VHDL' started by MNQ, Jul 7, 2003.

  1. MNQ

    MNQ Guest

    Hello All

    I have a process where the case statement is inside an if-then statement.
    this process runs one clock cycle behind the rest of the code. Am I correct
    in thinking that this process requires two clock cycles to start-up?

    Thanks

    Naveed
    MNQ, Jul 7, 2003
    #1
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  2. MNQ

    Mario Trams Guest

    MNQ wrote:

    > Hello All
    >
    > I have a process where the case statement is inside an if-then statement.
    > this process runs one clock cycle behind the rest of the code. Am I
    > correct in thinking that this process requires two clock cycles to
    > start-up?


    No.

    Bye,
    Mario
    Mario Trams, Jul 7, 2003
    #2
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  3. On Mon, 7 Jul 2003 10:54:38 +0100, "MNQ"
    <> wrote:

    >Hello All
    >
    >I have a process where the case statement is inside an if-then statement.
    >this process runs one clock cycle behind the rest of the code. Am I correct
    >in thinking that this process requires two clock cycles to start-up?



    Check for delta races, which can be caused by having multiple clock
    signals, e.g. clk1 and clk2, and you have a signal assignment
    somewhere that looks like this:

    clk2 <= clk1;

    which makes clk2 lag clk1 by 1 delta cycle. The two clocks look the
    same in your waveform viewer, but there is a difference.

    Regards,
    Allan.
    Allan Herriman, Jul 7, 2003
    #3
  4. MNQ

    Jon Guest

    Hi Naveed,
    It would help to post an outline of the VHDL code. Are you sure
    that in the if condition you are not using a registered version for
    comparison vs. using the signal directly? There could be other
    possible causes but without more information it is hard to say.

    Jon

    "MNQ" <> wrote in message news:<bebg11$k15$>...
    > Hello All
    >
    > I have a process where the case statement is inside an if-then statement.
    > this process runs one clock cycle behind the rest of the code. Am I correct
    > in thinking that this process requires two clock cycles to start-up?
    >
    > Thanks
    >
    > Naveed
    Jon, Jul 7, 2003
    #4
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