PSL pros and cons

Discussion in 'VHDL' started by Kumar Vijay Mishra, Sep 29, 2004.

  1. Hi.

    I would like to know the pros and cons of having Property
    Specification Language now offered with ModelSim 6.0. What is its
    future? In this respect, what is assertion-based verification (ABV)?
    And why all this now?

    Thanx in advance.

    KVM.
     
    Kumar Vijay Mishra, Sep 29, 2004
    #1
    1. Advertising

  2. Kumar Vijay Mishra

    Hans Guest

    Hi KVM,

    From my limited exposure to the language (I've just done an introduction
    course),

    Pros:
    1) Very powerful formal language, or assert statement on steroid for
    hardware engineers :)
    2) Easy to learn, most of the constructs are logical.
    3) Most EDA vendors seem to support it.
    4) There are even some vendors which can translate your embedded PSL
    constructs into hardware monitor.
    5) PSL can be embedded in your code (hardware engineer) or put into a
    separate vunit (verification engineer).
    6) PSL is a full formal language, a subset can be used in dynamic
    simulation.

    Cons:
    1) Only supported by high-end $$$ EDA tools (like Modelsim SE) which will
    limit its uptake.
    2) During my PSL course I felt that I needed another language to check my
    PSL.
    3) Easy to create spaghetti code (unreadable constructs).
    4) Requires a different mindset, i.e. engineer who do not use assert
    statements (other than to stop the simulator) or never heard of OVL will not
    use it.
    5) They created different flavoured version for VHDL and Verilog, so you can
    not write generic PSL. It shouldn't be too difficult to write a translator
    between the two flavours but I have seen it yet.
    6) Some EDA vendors only support the Verilog flavour

    If you want to learn language, get yourself onto a PSL course to make sure
    you learn how to think in PSL, secondly get yourself a tool which can
    generate VHDL from a drawn waveform, this will enable you to create simple
    stimulus for your PSL assertions. Get Ben Cohen's book,

    I definitely like the language and will use it for my next design,

    Regards,
    Hans.
    www.ht-lab.com


    "Kumar Vijay Mishra" <> wrote in message
    news:...
    > Hi.
    >
    > I would like to know the pros and cons of having Property
    > Specification Language now offered with ModelSim 6.0. What is its
    > future? In this respect, what is assertion-based verification (ABV)?
    > And why all this now?
    >
    > Thanx in advance.
    >
    > KVM.
     
    Hans, Sep 30, 2004
    #2
    1. Advertising

  3. Kumar Vijay Mishra

    vhdlcohen Guest

    I recommend that you read the postings on the
    http://verificationguild.com/
    and in particular, "Cost of ABV insertion vs Traditional verification
    methods"
    http://verificationguild.com/modules.php?name=Forums&file=viewtopic&t=564

    That posting had 700 views, and has useful info about assertion-based
    verification vs traditional methods discussed by engineers.
    Ben
    -----------------------------------------------------------------------------
    Ben Cohen Trainer, Consultant, Publisher (310) 721-4830
    http://www.vhdlcohen.com/
    for Wireless messages < 110-char
    Author of following textbooks:
    * Using PSL/SUGAR for Formal and Dynamic Verification 2nd Edition,
    2004 isbn 0-9705394-6-0
    * Real Chip Design and Verification Using Verilog and VHDL, 2002 isbn
    0-9705394-2-8
    * Component Design by Example ", 2001 isbn 0-9705394-0-1
    * VHDL Coding Styles and Methodologies, 2nd Edition, 1999 isbn
    0-7923-8474-1
    * VHDL Answers to Frequently Asked Questions, 2nd Edition, isbn
    0-7923-8115
    ------------------------------------------------------------------------------

    "Hans" <> wrote in message news:<W8Q6d.526$>...
    > Hi KVM,
    >
    > From my limited exposure to the language (I've just done an introduction
    > course),
    >
    > Pros:
    > 1) Very powerful formal language, or assert statement on steroid for
    > hardware engineers :)
    > 2) Easy to learn, most of the constructs are logical.
    > 3) Most EDA vendors seem to support it.
    > 4) There are even some vendors which can translate your embedded PSL
    > constructs into hardware monitor.
    > 5) PSL can be embedded in your code (hardware engineer) or put into a
    > separate vunit (verification engineer).
    > 6) PSL is a full formal language, a subset can be used in dynamic
    > simulation.
    >
    > Cons:
    > 1) Only supported by high-end $$$ EDA tools (like Modelsim SE) which will
    > limit its uptake.
    > 2) During my PSL course I felt that I needed another language to check my
    > PSL.
    > 3) Easy to create spaghetti code (unreadable constructs).
    > 4) Requires a different mindset, i.e. engineer who do not use assert
    > statements (other than to stop the simulator) or never heard of OVL will not
    > use it.
    > 5) They created different flavoured version for VHDL and Verilog, so you can
    > not write generic PSL. It shouldn't be too difficult to write a translator
    > between the two flavours but I have seen it yet.
    > 6) Some EDA vendors only support the Verilog flavour
    >
    > If you want to learn language, get yourself onto a PSL course to make sure
    > you learn how to think in PSL, secondly get yourself a tool which can
    > generate VHDL from a drawn waveform, this will enable you to create simple
    > stimulus for your PSL assertions. Get Ben Cohen's book,
    >
    > I definitely like the language and will use it for my next design,
    >
    > Regards,
    > Hans.
    > www.ht-lab.com
    >
    >
    > "Kumar Vijay Mishra" <> wrote in message
    > news:...
    > > Hi.
    > >
    > > I would like to know the pros and cons of having Property
    > > Specification Language now offered with ModelSim 6.0. What is its
    > > future? In this respect, what is assertion-based verification (ABV)?
    > > And why all this now?
    > >
    > > Thanx in advance.
    > >
    > > KVM.
     
    vhdlcohen, Oct 2, 2004
    #3
    1. Advertising

Want to reply to this thread or ask your own question?

It takes just 2 minutes to sign up (and it's free!). Just click the sign up button to choose a username and then you can ask your own questions on the forum.
Similar Threads
  1. ben cohen
    Replies:
    0
    Views:
    848
    ben cohen
    Jan 27, 2004
  2. Benny
    Replies:
    1
    Views:
    457
    Paul Wistrand
    Mar 1, 2004
  3. J.S.
    Replies:
    10
    Views:
    6,156
    shawpnendu
    May 20, 2009
  4. Randall Parker

    Pros and cons for using https on a logon page?

    Randall Parker, Dec 4, 2005, in forum: ASP .Net
    Replies:
    2
    Views:
    837
    nimd4
    May 17, 2014
  5. Maric Michaud

    threading and multicores, pros and cons

    Maric Michaud, Feb 14, 2007, in forum: Python
    Replies:
    24
    Views:
    1,202
    Paul Boddie
    Feb 20, 2007
Loading...

Share This Page