PWM using FPGA

Discussion in 'VHDL' started by iceman, Nov 13, 2004.

  1. iceman

    iceman Guest

    does anyone have a code for this? i will be using pwm for controlling
    a servo motor..
     
    iceman, Nov 13, 2004
    #1
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  2. iceman

    Leon Heller Guest

    "iceman" <> wrote in message
    news:...
    > does anyone have a code for this? i will be using pwm for controlling
    > a servo motor..


    There is some VHDL code for driving model control servos in "Rapid
    Prototyping of Digital Systems" by Hamblen and Furman. It's on the CD-ROM
    that comes with the book.

    Leon
     
    Leon Heller, Nov 13, 2004
    #2
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  3. "Leon Heller" <> wrote in message news:<419667b5$0$20216$>...
    > "iceman" <> wrote in message
    > news:...
    > > does anyone have a code for this? i will be using pwm for controlling
    > > a servo motor..

    >
    > There is some VHDL code for driving model control servos in "Rapid
    > Prototyping of Digital Systems" by Hamblen and Furman. It's on the CD-ROM
    > that comes with the book.


    My colleague Bert Cuzeau has done a nice description of simple
    motor control techniques:
    http://www.alse-fr.com/English/ApNote204189.pdf

    and a Google search through the comp.lang.vhdl archives will
    turn up several discussions of the same topic.
    --
    Jonathan Bromley
     
    Jonathan Bromley, Nov 14, 2004
    #3
  4. iceman

    krithika211

    Joined:
    Feb 1, 2009
    Messages:
    4
    spwm using fpga

    hi i am doing a project fpga based speed control of ac servomotor using SPWM.i need the vhdl coding for this. someone please help.
     
    krithika211, Feb 1, 2009
    #4
  5. iceman

    jeppe

    Joined:
    Mar 10, 2008
    Messages:
    348
    Location:
    Denmark
    Actually do you have two choises - PWM and PPM

    Code:
    library IEEE;
    use IEEE.STD_LOGIC_1164.ALL;
    use IEEE.STD_LOGIC_ARITH.ALL;
    use IEEE.STD_LOGIC_UNSIGNED.ALL;
    
    ENTITY PWM_vs_Sigma_Delta_v2 is
        generic( N:   natural := 4;
    	          Max: natural := 16);
        Port ( Clk :  in  STD_LOGIC;
    	        Scale: in  STD_LOGIC;
               PCM :  in  STD_LOGIC_VECTOR (N-1 downto 0);
               PWM :  out  STD_LOGIC;
               PPM :  out  STD_LOGIC);  -- or SD
    end PWM_vs_Sigma_Delta_v2;
    
    ARCHITECTURE Behavioral of PWM_vs_Sigma_Delta_v2 is
       signal PWM_Count:  STD_LOGIC_VECTOR (N-1 downto 0) := (others=>'0');
       signal Sigma: 		 STD_LOGIC_VECTOR (  N downto 0) := (others=>'0');
       signal Delta: 		 STD_LOGIC_VECTOR (  N downto 0) := (others=>'0');
    	signal Scaled_clk: STD_LOGIC;	
    begin
    
       process( Clk, Scale)
    		variable Scalex:	     integer;
    		constant Scale100msek: integer   :=   1; --5000;
    		constant Scale500msek: integer   :=   0; --25000;
    		variable Count:  integer range 0 to 50000001 := 0;
    	begin	   
    	   if Scale='1' then
             Scalex := Scale100msek; 
    		else 
             Scalex := Scale500msek;
    		end if;
    		
    	   if rising_edge(Clk)then
    			if Count>=Scalex then
    			   Scaled_clk <= '1';
    				Count      := 0;
    			else
    			   Scaled_clk <= '0';
    				Count      := Count+1;			
    			end if;
    		end if;
       end process;
    	
    	PWM_Generator: process( Clk, PWM_Count, PCM)
    	begin
    	   if rising_edge(Clk) then
    		   if Scaled_Clk='1' then
    			   if PWM_Count<Max-1 then
    		         PWM_Count <= PWM_Count+1;
    				else
                   PWM_Count <= (others => '0');	
                end if;					
    			end if;
    		end if;
    	   
    	   if PWM_Count<PCM then
    		   PWM <= '1';
    		else
    		   PWM <= '0';
    		end if;
    	end process PWM_Generator;	
    	
    	Delta <= '0'&PCM;	
       Sigma_Delta_Generator: process( Clk)
    	begin
    	   if rising_edge(Clk) then
    		   if Scaled_Clk='1' then
    				if Sigma<Max then
    					PPM   <= '0';
    					Sigma <= Sigma+Delta;	
    				else
    					PPM   <= '1';
    					Sigma <= Sigma+Delta-conv_std_logic_vector(Max,N+1);
    				end if;
    			end if;
    		end if;
    	end process Sigma_Delta_Generator;	
    		
    end Behavioral;
    The simulations can be seen here as well:
    http://www.jjmk.dk/MMMI/Exercises/05_Counters_Shreg/No7_PWM_vs_SigmaDelta/index.htm
    Your welcome
    Jeppe
     
    jeppe, Feb 1, 2009
    #5
  6. iceman

    krithika211

    Joined:
    Feb 1, 2009
    Messages:
    4
    fpga vhdl

    hi thanks a lot for the help.but i am stil a bit confused about this code.is it vhdl code to generate SPWM signals? i have not learnt vhdl programming that is why i am unable to figure out what exactly the code is for.in my project i have to generate Sine PWM (SPWM) signals using vhdl to control speed of ac servomotor.is it possible for u to give ur email id?i may need your help.
     
    krithika211, Feb 5, 2009
    #6
  7. iceman

    PRASAD84

    Joined:
    Feb 18, 2009
    Messages:
    1
    hi im doing project on pwm control of bldc motor using FPGA

    hi krithika im also doing project on fpga.
    i have some pwm codes. it is better if we discuss about our projects .reply me at
    please give me ur mail id also
    prasadpabolu gmailcom
    my mobile no +91 9952586864
    my mail id is prasadpabolu at the rate of gmail dot com
    please give me reply
     
    Last edited: Feb 18, 2009
    PRASAD84, Feb 18, 2009
    #7
  8. iceman

    necostefan

    Joined:
    Feb 24, 2010
    Messages:
    1
    hi, i have too a project like yours(a pwm control of BLDC motor using FPGA) and i don't have the code for it.Please help me if you have something.Cosmin
     
    necostefan, Feb 24, 2010
    #8
  9. iceman

    subhash_iitr

    Joined:
    Feb 24, 2010
    Messages:
    2
    I am beginner in FPGA design. I want to interface ADC no: AD7822 to virtex-5 (ML-505) kit externally.The ADC -AD7822 is a parallel ADc .Please guide me in doing this and perovide me the VHDL code for interfacing parallel ADC.
    Thanks
     
    subhash_iitr, Feb 25, 2010
    #9
  10. iceman

    Joined:
    Mar 9, 2010
    Messages:
    1
    hi to all
    my project is to control the position of AC servo motor by sliding mode control can anybody guide me how to proceed and how i get the VHDL/verilog code for same help me if possible
    thanks in advance
     
    , Mar 9, 2010
    #10
  11. iceman

    mera

    Joined:
    Mar 29, 2011
    Messages:
    5
    hi everyone
    please please please take attention to my letter
    my project is to control dc motor by using fpga so i want from you to help me with the vhdl code as soon as you can i hope if you can next week
    thanks
     
    mera, Mar 29, 2011
    #11
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