Questions about single process coding style

Discussion in 'VHDL' started by jasonL, May 30, 2007.

  1. jasonL

    jasonL

    Joined:
    Mar 16, 2007
    Messages:
    4
    Reference link
    http://home.comcast.net/~mike_treseler/

    Q1: Have the single process coding style been synthesized with synopsys tools?
    I tried to synthesis the Uart example with Synopsys Design_Analyzer but failure. A error message “ try to use synchronized value”. Dose synopsys not support this coding style or just my tool is too old, 2005 version?

    Q2: What does the warning message in Xilinx ise mean?
    I synthesized the UART example with ISE7.1 successfully, but a lot of warning messages for variables in design. The warning message is “Potential simulation mismatch, variable ABC declared in block A is assigned in block B”. What is the risk in this warning?

    Q3: Does the testbench in reference link work?
    I try simulation the Uart example but it wouldn’t run. The error message is “Simulator:222 - Generated C++ compilation was unsuccessful”. Is my ISE7.1 is too old or there is errors in testbench?
    Could someone please fix it for ISE7.1?


    Q4: Has The Uart example passed post_synthesis simulation?
    I wrote a hardware module using single process style. Pre-synthesis behavior simulation is passed. It is synthesized successfully using ISE7.1 with a lot warning as mentioned above. While doing post-synthesis model simulation, “XX” unknown signals are generated inside Hardware module. I do reset the hardware at the beginning of simulation and from waveform reset work. Somehow a few clock cycle after, signal turn to be “XX” unknown.

    I use same testbench for pre- and post- synthesis model and the post-synthesis model is generated by ISE7.1, ModuleName_synthesis.vhd.

    Has The Uart example done post_synthesis simulation? After all, synthesizable does not mean correctly synthesized.

    Thanks for any informantion
     
    jasonL, May 30, 2007
    #1
    1. Advertising

  2. jasonL

    jasonL

    Joined:
    Mar 16, 2007
    Messages:
    4
    Is Mike here :question:
     
    jasonL, Jun 3, 2007
    #2
    1. Advertising

Want to reply to this thread or ask your own question?

It takes just 2 minutes to sign up (and it's free!). Just click the sign up button to choose a username and then you can ask your own questions on the forum.
Similar Threads
  1. Paul Baxter

    style for coding latches

    Paul Baxter, Aug 10, 2003, in forum: VHDL
    Replies:
    7
    Views:
    1,146
    Mike Treseler
    Aug 15, 2003
  2. calmar
    Replies:
    11
    Views:
    902
    calmar
    Feb 21, 2006
  3. Mike Treseler
    Replies:
    24
    Views:
    1,590
    Mike Treseler
    Jun 22, 2007
  4. adamk
    Replies:
    9
    Views:
    853
    Mike Treseler
    Jan 21, 2010
  5. Ken Varn
    Replies:
    0
    Views:
    474
    Ken Varn
    Apr 26, 2004
Loading...

Share This Page