Re: 3state/gate-based MUXes

Discussion in 'VHDL' started by Paul Uiterlinden, Aug 4, 2009.

  1. Sleep Mode wrote:

    > So, the questions are:
    > i) Should two 3states cost LESS (area, power) than a 2-1 MUX? Up to now
    > I thought yes. Perhaps the UMC90 library is funny. Any clues? Could it
    > be that my vhdl syntax is not efficient or something?


    Have you checked the resulting schematics after synthesis? Are you really
    getting tri-state buffer and muxes where you would expect them? For the
    rest: I have no experience with the UMC90 library (or any library).

    > ii) More generally, except for the fact that 3states give design tools a
    > hard time when debugging, is it a good practice to use 3states instead
    > of MUXes for *low-power* design? I have read somewhere that ASIC
    > professionals tend to use 3states only in buses and on chip I/Os...


    Using internal tri-state buffers cause problem after scan insertion. During
    scan test contention may occur (multiple active drivers on one "wire"),
    even if you have taken care that this is not possible in normal
    (functional) operation mode.

    --
    Paul Uiterlinden
    www.aimvalley.nl
    e-mail addres: remove the not.
    Paul Uiterlinden, Aug 4, 2009
    #1
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