Re: Analysis and Design

Discussion in 'VHDL' started by Roadie Roger, Jun 28, 2003.

  1. Roadie Roger

    Roadie Roger Guest

    "Jörg Breitenstein" <> wrote in message news:<3ef972aa$0$1053$>...
    > Hi
    > Does anyone now if there is a good methologie to analyse and design digital
    > systems. There are plenty of books about VHDL, but that's the language. I'm
    > looking for somenthing like SA/SD or UML for software Design. But this vor
    > digital hardware.
    >
    > Does Ben Cohen's Book cover topics like this?
    >
    > Vhdl Coding Styles and Methodologies.
    >
    > ???
    >
    > Thanx
    >
    > Joerg

    You've got at least two issues here. Programming and Digital Design.

    I'm sure that VHDL programming can benefit from all the software
    productivity and correctness type tools. Revision control, formal
    specifications, elaborate testing. I only dabble in programming, so
    I'm not sure what state of the art is today. Maybe somebody can
    comment on the tools used by large multi-engineer ASIC projects.
    Paying for large complicated software projects can be very expensive
    and can easily go out of control. If I was paying for a large VHDL
    project I'd be very concerned about these issues.

    Digital logic design isn't as straight forward as it may seem. An
    ounce of insight and clever partitioning can be worth a pound of
    logic. Propagate/Generate bits on adder slices aren't obvious, but
    can substantially reduce logic gates and give excellent speed. I
    don't think there is any Holy Grail of logic design that will pop this
    out. It was an important problem that lot's of people looked at and
    this was a very good solution. I don't even think that optimal state
    assignment and output assignment can be guaranteed. VHDL is famous
    for blowing up at synthesis and using way more gates than the minimum
    because the tools didn't recognize that there is a clever method
    available for what you are doing.

    Design reviews of Digital Logic or VHDL are incredibly educational.
    Getting 8 experienced, intelligent and competitive people in a room
    and asking them to criticize something can spin you up the learning
    curve in a hurry. It's entertaining too, in a Dr. Laura
    reach-down-their-throat-and-rip-out-their-heart sort of way :) I just
    never get tired of that.

    I guess I don't have a great solution for you. It's a pretty good
    question though.

    Roadie Roger
    <http://home.earthlink.net/~roadieroger/index.htm>
    Roadie Roger, Jun 28, 2003
    #1
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