Re: Conversion of sequential time-sensitive algorithm to VHDL

Discussion in 'VHDL' started by Oliver Mattos, Feb 3, 2011.

  1. Hi,

    Thanks very much for your responses! I think I'll try both approaches, and see which comes out faster/less area.

    Thanks
    Oliver
    Oliver Mattos, Feb 3, 2011
    #1
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