Re: Mixed language simulation on the cheap

Discussion in 'VHDL' started by John McCaskill, Aug 13, 2009.

  1. On Aug 13, 4:03 pm, Rob Gaddi <> wrote:
    > I only speak VHDL.  Unfortunately, the memory interface generator in
    > ISE 11.2 for Spartan-6 only speaks Verilog.  Specifically, the device
    > models underneath are in the silly encrypted Verilog format, so I can't
    > even go spelunking around.
    >
    > So far, Modelsim XE Starter (free) has been sufficient for all my
    > simulation needs.  In order to do mixed language simulation, however,
    > I'd need to step up to Modelsim PE, which I just had quoted to me for
    > slightly under $10K for a one year license.
    >
    > All I really need it for is to simulate out my memory interface stuff;
    > I have very little interest in adding lots of mixed language
    > programming to my world.  And so ten kilobucks is really quite the
    > chunk of change for solving one problem.
    >
    > Does anyone know of any better solutions for mixed language
    > simulation?  I had been thinking this would cost me somewhere in the
    > $2K ballpark; at $10K I'd be better off sticking with "program and
    > pray".
    >
    > --
    > Rob Gaddi, Highland Technology
    > Email address is currently out of order


    Hello Rob,

    The ISIM simulator that comes with ISE supports mixed VHDL and Verilog
    simulation. It comes standard with all editions of ISE. Look here:
    http://www.xilinx.com/tools/logic.htm, and click on the ISIM link for
    details.

    Regards,

    John McCaskill
    Faster Technology
    Xilinx Authorized Training Provider
    http://www.fastertechnology.com/training.html
     
    John McCaskill, Aug 13, 2009
    #1
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