Re: Process to combinational circuits?

Discussion in 'VHDL' started by Tricky, Sep 4, 2013.

  1. Tricky

    Tricky Guest

    To expand on Al's point, I thought I would just give 3 examples of a mux. Which one is "best" is really up to the designer, but it is consistancy and readability that are important:

    op <= ip0 when sel = "00" else
    ip1 when sel = "01" else
    ip2 when sel = "10" else
    ip3 when sel = "11" else
    'X';

    -------

    mux : with sel select
    op <= ip0 when "00",
    ip1 when "01",
    ip2 when "10",
    ip3 when "11",
    'X' when others;

    -------

    mux_proc : process(sel, ip0, ip1, ip2, ip3)
    begin
    case sel is
    when "00" => op <= ip0;
    when "01" => op <= ip1;
    when "10" =>
    op <= ip2;
    report "Case 2 selected for output" severity NOTE;
    when "11" => op <= ip3;
    when others => op <= 'X';
    end case;
    end process;



    Notice how the process version also allows for extra debug informaton, or any other code that fits in with that logic (maybe you want to combine 3 muxes into 1 process)
    Tricky, Sep 4, 2013
    #1
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